Follow us on:
Subscribe Twitter Facebook

Wednesday, March 31, 2010

White Paper: Optimizing a DSP Architecture for Wireless Baseband

The high computation demands of next-generation cellular and broadcast wireless require both higher efficiency and greater flexibility in baseband processing. New DSP architectures are needed for applications with heavy workloads with complex filtering, FFT, and MIMO matrix operations.

The ConnX Baseband Engine is a configuration option package for Tensilca's Xtensa LX customizable processor core. It implements a 3-way VLIW, 8-way SIMD architecture that can sustain 16 multiply-add operations per second and performance of a full radix-4 FFT butterfly per cycle. At 400 MHz, it provides almost 13GM per second of memory bandwidth and 1.6B complex FIR filter taps per cycle. It directly implements 8-way parallel division and 4-way parallel reciprocal square root operations.  And up to eight ConnX Baseband Engines can be used together for maximum performance.

The rich programming environment, including vectorization of scalar C applications, allows easy deployment of into complex applications.  In addition, the Xtensa processor family, including the ConnX Baseband Engine, supports easy integration of multiple cores with high-bandwidth memory and direct port interconnect among each tightly-coupled cluster of cores.

The ConnX Baseband Engine is specifically designed for digital television, cellular basestation, femto-cell and other software-agile radio applications and is also being used to provide full programmability for  multi-standard broadcast receivers.