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Friday, February 26, 2010

How to do multicore design the right way?

Check out our web section on some of the things you must consider when doing multicore design. Most of our customers do multicore design because one core just can't do everything. Specialized cores for the dataplane are the answer.

Thursday, February 25, 2010

Smartphone (ARM) or Netbook (Intel)? You'll find Tensilica in Both

Fore very one applications processor (ARM or Intel) there are tens or hundreds of other processors doing the baseband DSP, audio, video, graphics, security, biometrics, WiFi, GPS, and much more. And that's where you'll find Tensilica's dataplane processors (DPUs).

Tuesday, February 23, 2010

WW Sales Conference This Week

I'm really looking forward to today's updates from the sales team. Tomorrow's marketing's turn to present new product plans and strategies. I'm on the schedule to discuss our next seminar program among other exciting things. This year looks much better than last at this point in time. Last year turned out great, but it was pretty dismal in February. New design activity has picked up worldwide.

Monday, February 22, 2010

Saluting partner HiFi Audio Partner Dolby Labs

Tensilica offers the most complete set of fully qualified decoders for Dolby's fantastic audio products, including Dolby TrueHD, for Tensilica's HiFi 2 and HiFi EP Audio DSPs.

Thursday, February 18, 2010

Mobile World Congress Booth Was Packed - see the pic

Yes, this is our booth at the MWC in Barcelona. It was packed! Great show for Tensilica. Lots of important meetings and an opportunity to meet a lot of new people with creative ideas for next-generation smart phones. Our ConnX Baseband Engine and demo with mimoOn was a particular draw for the crowds. Sometimes it was hard to clearly hear the audio demos because it was so busy.

Wednesday, February 17, 2010

New Job Opening: Applications Engineer, Santa Clara

You will be a member of the applications engineering team at Tensilica, with a focus on software development for Xtensa processors and usage of Xtensa software tools. The applications engineering team is responsible for the worldwide support of Tensilica customers, helping them use and integrate our microprocessor cores in their SoCs and develop software for these microprocessor cores. The team is also responsible for training customers on our tools and technologies, authoring application notes and other collateral that helps customers make effective use of our products.

Tuesday, February 16, 2010

Thinking 4G? Read our whitepaper: The 5 Pitfalls of 4G Baseband SOC Design

As Tensilica has been working with its customers to design building blocks for LTE PHY designs, including the DSPs and forward-error-correction subsystems, we've realized five key pitfalls associated with LTE baseband development.

Friday, February 12, 2010

See Tensilica at Mobile World Congress Booth 7C35

Last call for private meetings. See our new ConnX BBE16 Baseband Engine, the ConnX Atlas Reference Architecture, and - of course - our new HiFi EP and video in action.

Thursday, February 11, 2010

Wednesday, February 10, 2010

Xtensions Partner Program Expands for LTE/4G Design

Tensilica's Xtensions Partner Program brings its LTE baseband handset and base station design customers a robust infrastructure of top-tier partners in SOC (system-on-chip) design-critical areas such as LTE physical layer software solutions, system level modeling, real time operating systems emulation, and design services.

New Partner: mimoOn for LTE handset software

Partnership with mimoOn offers best-in-class LTE solutions for mobile wireless radios based on mimoOn's mi!MobilePHY software and Tensilica's newly announced ConnX Baseband Engine (BBE16) and ConnX Atlas LTE Reference Architecture.

Tuesday, February 09, 2010

HiSilicon, a division of Huawei, Licenses Tensilica's Xtensa Dataplane Processors and ConnX DSPs

HiSilicon will use Tensilica's DPUs and DSPs in network equipment chip design.

"We conducted a thorough review and evaluation of licensable DSP IP cores before selecting Tensilica," stated Teresa He, Vice President of HiSilicon. "Tensilica's unique ability to combine world-class DSP capability with the flexibility and customization of the Xtensa DPUs gives HiSilicon the opportunity to strongly differentiate our products. We feel this will give us a strong competitive advantage."

Monday, February 08, 2010

New ReferenceArchitecture for LTE Designs

The ConnX Atlas LTE (Long-Term Evolution) reference platform is a heterogeneous seven-core reference architecture for a complete multi-standard programmable radio for advanced mobile devices. Atlas is designed to support the 3GPP LTE standard, as well as other complementary standards such as HSPA+, in a single platform. No additional hardwired hardware blocks are required, even for the computationally complex turbo decoder at 154 Mbps downstream data rates.

Second Generation ConnX BaseBand Engine DSP for Demanding Algorithms for LTE/4G Wireless Handsets and Base Stations

ConnX BBE's 16-way MAC architecture is optimized for the most demanding wireless DSP tasks, including ODFM, FFT, FIR, IIR, and matrix computations. We introduced the first BBE in June of 2009. Tensilica has licensed ConnX BBE to several customers and it is already in volume production. Based on customer feedback, Tensilica developed its next generation DSP: the ConnX BBE16. ConnX BBE16 was developed in record time, leveraging the Tensilica Xtensa® customizable processor foundation technology.

Friday, February 05, 2010

Monday, Monday, Monday

I've been very busy (and will be working this weekend) getting ready for Monday's big announcements - another LTE solution coming right up!

Wednesday, February 03, 2010

Specs for HiFi EP Running DTS Master Audio

Just loaded on our web site the performance data on all of the DTS applications, including the incredibly demanding DTS Master Audio. With HiFi EP, single-core Blu-ray Disc SOCs can easily be implemented in 65GP with additional MHz to spare for other audio functions.

Tuesday, February 02, 2010

New HiiFi EP Reduces MHz Requirement for DTS Master Audio

HiFi EP's architectural enhancements significantly improve DTS Master Audio decoding and tolerance to high external memory latency. With HiFi EP, single-core Blu-ray Disc SOCs can easily be implemented in 65GP with additional MHz to spare for other audio functions. See the mHz savings.

Monday, February 01, 2010

New HiFi EP for Home Entertainment and Smartphones

Building on the success of its HiFi 2 Audio DSP, the leading architecture for audio in SOC designs, Tensilica today introduced HiFi EP, a superset of the HiFi 2 architecture that is optimized for simultaneous multichannel codec support and/or continuously expanding audio pre and post processing in home entertainment products such as Blu-ray Disc players, digital television (DTV), and Smartphones. It has also been enhanced for very efficient, high-quality voice pre-and post-processing. These enhancements result in up to 40 percent lower power and up to a 50 percent size reduction. Tensilica will be demonstrating its HiFi EP Audio DSP (digital signal processing) Engine in booth 7C35 at the Mobile World Congress, February 15-18, 2010 in Barcelona, Spain.