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Tuesday, April 15, 2008

Free Diamond 106Micro for FPGAs

Tensilica has joined Synplicity’s new ReadyIP Program and is providing the Diamond Standard 106Micro processor core – the industry’s smallest licensable 32-bit processor core based on an industry-standard architecture – free of charge through this program. The ReadyIP program delivers a vendor independent design methodology for FPGA implementation and allows designers to easily access, evaluate and incorporate third-party intellectual property (IP), like the Diamond Standard 106Micro, using Synplicity’s Synplify Pro and/or Synplify Premier Version 9.2 FPGA synthesis environments.

This week at the Embedded Systems Conference (ESC) in San Jose, CA, the companies will showcase how easy it is to download Tensilica’s Diamond Standard 106Micro processor core through the Synplicity tool flow.

For more information, see

Thursday, April 03, 2008

Chris Rowen Elected to EDA Consortium Board of Directors

Chris Rowen, president and CEO of Tensilica, Inc., was elected to the Board of Directors of the EDA Consortium, the international association of companies developing EDA tools and services that enable engineers to create the world's electronic products.

“The EDA Consortium is ideally positioned in two key areas,” Rowen stated. “First, it’s positioned to raise the profile of EDA’s special role among customers, investors, developers, the electronics media and the broader public. Second, it plays an important role coordinating computing platform strategies, influencing export license models, pressing for smart education and immigration policies, and other key industry concerns. I am excited about serving this important community.”

Dr. Chris Rowen was a pioneer in the development of RISC architecture at Stanford in the early 1980s and helped start MIPS Computer Systems Inc. in 1984, where he served in a variety of functions including vice president for Microprocessor Development and managed MIPS in Europe. When Silicon Graphics purchased MIPS, he became the technology and market development leader for Silicon Graphics Europe. In 1996, he became Synopsys’ vice president and general manager of the Design Reuse Group. He founded Tensilica in July 1997. He received a B.A. in physics from Harvard University and M.S. and Ph.D. in electrical engineering from Stanford University.

Tuesday, April 01, 2008

New GUI Helps Cut Chip Energy Consumption

Tensilica has added a new graphical user interface (GUI) to its popular Xenergy estimator, a unique energy estimator for both Xtensa configurable processors and Diamond Standard processors. This “first of its kind” tool allows software developers to evaluate trade-offs, so their software can be optimized for power, and lets hardware designers optimize the design of Xtensa configurable processors for total energy consumption. For more information, see