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Tuesday, June 30, 2009

See How Easy it is to Configure a Processor

Yes, you can do this! Watch the video. Chris Rowen, our CTO, shows just how easy it is to pick the configuration options you need for your processor core:

Monday, June 29, 2009

See how Epson Uses Multiple Xtensa Processors in Printers

What's the secret behind Epson's Realoid chip inside their inkjet printers? It's not a secret any more. Find out how multiple Xtensa processor cores give more flexibility and programmability over previous generation hardwired RTL solution

Wednesday, June 24, 2009

The ConnX 545Ck - the fastest DSP core ever

See why BDTI benchmarked the ConnX 545Ck as the fastest DSP core they've ever tested. See

Tuesday, June 23, 2009

Accelerated Interrupt Handling Ap Note

Fast interrupt handling is important to system throughput and responsiveness. This application note describes a method to use existing Xtensa features and configuration options to support very fast interrupt handling. This note focuses on the interrupt handling case, i.e, that case where one task is running, but is preempted at some random point by an external or timer interrupt, which then performs an independent task.

New White Paper on DSP

New white paper: Optimizing a DSP Architecture for Wireless Baseband. See

Monday, June 22, 2009

New ConnX DSP Family

Tensilica today introduced a new family of high-performance DSPs IP cores - the ConnX DSP family - that include standard cores, click-box configurable options or a starting point for customized Xtensa LX DPUs for SOC designs.

"With its configurable instruction set, Tensilica has morphed its basic Xtensa RISC architecture to become a compelling DSP engine," stated Will Strauss, president of Forward Concepts. "The company's first giant leap into the DSP world was through the design of their HiFi 2 Audio Engine into cellular phones, Blu-ray Disc players, and other home entertainment products, where they've had considerable success. Now, with the ConnX DSP Baseband Engine, Tensilica is taking aim at the fastest growing part of the market - next generation wireless. They already have major customers - including Fujitsu, Panasonic and NEC - doing their own designs in this market. I expect they will do quite well with this high-performance DSP engine."

Tensilica Introduces New ConnX Baseband Engine

The ConnX Baseband Engine enables efficient baseband processing for 3G, LTE (Long-Term Evolution) and 4G wireless equipment with its scalable, high-performance DSP architecture that provides industry leading computational throughput of 16 18-bit MACs per cycle. The ConnX Baseband Engine features an optimized instruction set, high memory bandwidth, scalable clustering, and efficient compiler support with an easy programming model for SIMD (Single Instruction, Multiple Data) vectorization and other DSP functions. This high performance core is also an effective solution for multi-standard fixed and mobile DTV broadcast demodulators.

DOCOMO Capital invests in Tensilica

DOCOMO Capital is the corporate venture arm of NTT DOCOMO, Japan’s leading wireless carrier.

“We recognize the growing importance of Tensilica’s customizable DPUs for semiconductors that enable lower power and innovative mobile devices, and that’s why we made this investment,” stated Tomoya Hemmi, president and CEO, DOCOMO Capital. “Tensilica’s high-performance DPUs for audio, video and baseband functions will be key enablers for new capabilities and increased battery life in future mobile telephones.”

For more information, see

Thursday, June 18, 2009

Try Trace-X for Free

Tensilica partner Xpress Logic offers free trial of Trace-X

See how easy it is to configure a processor

Watch Chris Rowen, Tensilica's CTO, configure a processor. See how easy it is to make the trade-offs you need.

Wednesday, June 17, 2009

Why use Tensilica cores for control tasks?

While they excel as dataplane processors, Tensilica’s Diamond Standard and Xtensa processors are ideal control processors and can be used as-is or tailored to match your performance targets. Tensilica's cores can be used as compact controllers, medium-performance RISC controllers, and high-performance RISC CPUs. See more at

Friday, June 12, 2009

AES Ap Note

Application note: Implementing the Advanced Encryption Standard on Xtensa Processors - - This application note examines the Advanced Encryption Standard (AES) cipher and illustrates the power of a configurable processor in accelerating encryption and decryption. Xtensa-based application-specific processors are quickly designed, simulated, and instantiated in silicon.

Thursday, June 11, 2009

Just Launched New Web Site

We just launched a new web site for Tensilica. Come look around. You'll see videos, lots of app notes and documentation, and other good stuff.

Wednesday, June 10, 2009

EETimes article on Great Semi Company Gaffes

Just read this great article in EEtimes on the biggest recent mistakes by semiconductor companies:

Tuesday, June 09, 2009

TranSwitch Integrates Tensilica Xtensa Processors into its Atlanta 2000 Gigabit-rate Communications Processor

TranSwitch Corporation has integrated two Xtensa customizable Dataplane Processor Units (DPUs) into its recently introduced Atlanta 2000 gigabit-rate communications processor product family.

Atlanta 2000 highlights the versatility of Tensilica’s DPUs. Although Tensilica is best known for its dominant position for the SOC (system-on-chip) dataplane applications, the Atlanta 2000 is an example of how Tensilica’s customizable DPUs can also be utilized as cores for the most demanding embedded CPU applications.