Monday, December 15, 2008
MegaChips Becomes Tensilica Authorized Design Center
MegaChips Corporation, of Osaka, Japan, has become an authorized Tensilica design center. Companies needing SOC (system-on-chip) design services in Japan can take advantage of MegaChips’ expertise in the design of video and imaging products as well as communications products. For more information, see http://www.tensilica.com/news_events/pr_2008_12_15.htm
Thursday, December 11, 2008
ASTRI Selects Tensilica Processor Cores for Video Research
Hong Kong Applied Science and Technology Research Institute Company Limited (ASTRI) has selected Tensilica’s Xtensa customizable processor cores for a video research project. The government of Hong Kong created ASTRI to perform high-quality R&D (research and development) for technology transfer to industry, develop needed technical human resources, and act as a focal point that brings together industry and university R&D assets.
For more information, see http://www.tensilica.com/news_events/pr_2008_12_10.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_12_10.htm
HyperSilicon Becomes New Tensilica Prototyping Partner in China
HyperSilicon Co., Ltd, of Beijing, China, has become Tensilica's newest SOC prototyping partner, supporting customers of both the Xtensa customizable processors and the Diamond Standard processor cores in the growing China market. HyperSilicon has particular expertise in designing FPGA development boards, which are often used to test new chip designs before producing the chip in silicon. More information is available at http://www.tensilica.com/news_events/pr_2008_12_08.htm
Labels:
partner
Friday, December 05, 2008
Sibridge Technologies Becomes Tensilica Authorized Design Center
Sibridge Technologies has become an authorized Tensilica design center, supporting customers of both the Xtensa configurable processors and the Diamond Standard processor cores. Sibridge has offices in Fremont, CA, and Ahmedabad, India, and supports a number of global electronics companies.
Sibridge provides innovative solutions for design, verification, and silicon platform software development of SoCs to semiconductors worldwide. The company offers a unique blend of three critical components in the development of SoCs: design and verification IP portfolios; strong chip design, integration and verification expertise; and pre and post silicon firmware development and validation for streaming media and networking applications.
For more information, see http://www.tensilica.com/news_events/pr_2008_12_04.htm
Sibridge provides innovative solutions for design, verification, and silicon platform software development of SoCs to semiconductors worldwide. The company offers a unique blend of three critical components in the development of SoCs: design and verification IP portfolios; strong chip design, integration and verification expertise; and pre and post silicon firmware development and validation for streaming media and networking applications.
For more information, see http://www.tensilica.com/news_events/pr_2008_12_04.htm
Wednesday, December 03, 2008
P-Product Becomes Tensilica Authorized Software Design Center
P-Product, of Needham, MA, has joined Tensilica’s Xtensions Partner network as an authorized software design center, specializing in efficient implementations of digital signal processing (DSP) software. P-Product has extensive expertise in audio and video as well as in WiMAX and LTE. P-Product has already ported multiple audio software modules to Tensilica’s popular HiFi 2 Audio Engine. For more information, see http://www.tensilica.com/news_events/pr_2008_12_02.htm
HiFi 2 Audio DSP Now Supports Dolby DAB+
Tensilica added the aacPlus by Dolby for Digital Audio Broadcasting (DAB+) decoder to its audio codec library for its Xtensa HiFi 2 Audio DSP, one of the most popular commercial audio cores for system-on-chip (SOC) designs.
DAB+ is the successor to DAB which is currently deployed in many European countries, Canada, China and South Korea. The DAB+ standard is based on HE-AAC v2, which provides audio with equivalent or better subjective quality at lower bit rates than MPEG Audio Layer II used in DAB. The DAB+ standard is now being adopted by digital radio stations. It is already being broadcast in Italy, Malta and Singapore and deployments are planned for later this year and 2009 in Australia, Germany, Switzerland, the Czech Republic, and other countries around the globe.
For more, see http://www.tensilica.com/news_events/pr_2008_11_19.htm
DAB+ is the successor to DAB which is currently deployed in many European countries, Canada, China and South Korea. The DAB+ standard is based on HE-AAC v2, which provides audio with equivalent or better subjective quality at lower bit rates than MPEG Audio Layer II used in DAB. The DAB+ standard is now being adopted by digital radio stations. It is already being broadcast in Italy, Malta and Singapore and deployments are planned for later this year and 2009 in Australia, Germany, Switzerland, the Czech Republic, and other countries around the globe.
For more, see http://www.tensilica.com/news_events/pr_2008_11_19.htm
Carbon and Tensilica Partner for Pre-Silicon Firmware Development
“Tensilica’s cycle-accurate processor models, running together with implementation-accurate Carbon Models in an SoC Designer environment, will enable users to debug complex firmware and hardware issues well in advance of silicon,” stated Bill Neifert, vice president of business development for Carbon Design Systems. “SoC Designer’s industry-leading speed will also enable this to be done more quickly than with any other virtual platform. In addition, designers can leverage SoC Designer’s advanced profiling features to quickly see the positive impact Tensilica processors can have in the dataplane of their SOC designs.”
For more info, see http://www.tensilica.com/news_events/pr_2008_11_18.htm
For more info, see http://www.tensilica.com/news_events/pr_2008_11_18.htm
Tuesday, November 11, 2008
New RealVideo Codec for 388VDO
bTensilica has ported the RealVideo codec from digital entertainment services company RealNetworks, Inc. (RNWK) to the 388VDO Video Engine, increasing the versatility of this popular video chip subsystem. The RealVideo codec expands the applicability of Tensilica's 388VDO video processor to products that efficiently display Internet content on everything from mobile devices to extended standard definition DTV.
The RealVideo codec is fully compliant with RealVideo 9 and 10, so users can experience high-quality video from numerous sources in China . By using new technology that employs rigorous analysis to decompose and compress video content as well as more sophisticated image segmentation and motion analysis, it provides the same quality video at 80 percent lower bit rate than MPEG-2, 75 percent lower bit rate than HDTV, 45 percent lower bit rate than MPEG-4 (ASP), 30 percent lower bit rate than WMV 9, and 15 percent lower bit rate than H.264.
The RealVideo codec is fully compliant with RealVideo 9 and 10, so users can experience high-quality video from numerous sources in China . By using new technology that employs rigorous analysis to decompose and compress video content as well as more sophisticated image segmentation and motion analysis, it provides the same quality video at 80 percent lower bit rate than MPEG-2, 75 percent lower bit rate than HDTV, 45 percent lower bit rate than MPEG-4 (ASP), 30 percent lower bit rate than WMV 9, and 15 percent lower bit rate than H.264.
PowerLayer Microsystems Licenses 388VDO Video
PowerLayer Microsystems (PLM), a fabless IC design company headquartered in Beijing, China, licensed the 388VDO video engine, a complete video subsystem that will be designed into integrated circuits for HDTV sets. The 388VDO will be used to decode content from the Internet.
“Many people want to enjoy their TV and Internet content on one device, and the 388VDO gives us the video quality we need for the display of Internet video and images,” stated Dr. Xu Dong, president and COO, PowerLayer Microsystems. “We were impressed because it was a total drop-in solution, both hardware and software.”
For more info, see http://www.tensilica.com/news_events/pr_2008_11_4.htm
“Many people want to enjoy their TV and Internet content on one device, and the 388VDO gives us the video quality we need for the display of Internet video and images,” stated Dr. Xu Dong, president and COO, PowerLayer Microsystems. “We were impressed because it was a total drop-in solution, both hardware and software.”
For more info, see http://www.tensilica.com/news_events/pr_2008_11_4.htm
Panasonic Picks Tensilica
Panasonic Mobile Communications Co. Ltd. (President: Osamu Waki), located in Tsuzuki-ku, Yokohama, Japan, (Panasonic Mobile) has licensed the Xtensa LX2 customizable processor core for a baseband processor integrated circuit for mobile phones. Now Panasonic Mobile will develop several different configurations of the Xtensa processor. For more information, see http://www.tensilica.com/news_events/pr_2008_10_14.htm
Wednesday, October 01, 2008
Rhonda Becomes Tensilica’s First Authorized Software Design Center
Rhonda Ltd., a Russian software development outsourcing company, has joined Tensilica’s Xtensions Partner network as the first authorized software design center. Rhonda offers the full cycle of software development from project management through design and test to documentation and maintenance. They are the largest software house in the Russian Far East and have extensive expertise in embedded software for mobile handsets.
For more information, see http://www.tensilica.com/news_events/pr_2008_10_01.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_10_01.htm
Tuesday, September 30, 2008
Fujitsu Adopts Tensilica’s Xtensa Processor as Baseband Processor for Fujitsu Mobile Phone
Fujitsu Limited of Tokyo, Japan, has licensed the Xtensa LX2 customizable processor core as the baseband processor for Fujitsu’s mobile phone.
“We are pleased to have been selected by Fujitsu, a leader in the mobile phone market,” stated Jack Guedj, Tensilica’s CEO. “With the Xtensa LX2 processor core, Fujitsu’s design teams can innovate more quickly while reducing design risks. Our Xtensa products are a good match for baseband DSP applications as they can be optimized to achieve unparalleled levels of speed/power/performance.”
For more information, see http://www.tensilica.com/news_events/pr_2008_09_29.htm
“We are pleased to have been selected by Fujitsu, a leader in the mobile phone market,” stated Jack Guedj, Tensilica’s CEO. “With the Xtensa LX2 processor core, Fujitsu’s design teams can innovate more quickly while reducing design risks. Our Xtensa products are a good match for baseband DSP applications as they can be optimized to achieve unparalleled levels of speed/power/performance.”
For more information, see http://www.tensilica.com/news_events/pr_2008_09_29.htm
Tensilica Joins Atrenta’s SpyLinks Partner Program
Tensilica has joined Atrenta’s SpyLinks partner program and has deployed Atrenta’s SpyGlass suite to optimize synthesizability, power management, constraints management, design for test, and timing for new processor cores.
“Atrenta’s SpyGlass is well respected for its ability to find critical problems very early in the design cycle,” stated Chris Jones, Tensilica’s director of industry alliances. “Our engineers feel that the product suite provides high quality results and saves valuable design time.”
For more information, see http://www.tensilica.com/news_events/pr_2008_09_30.htm
“Atrenta’s SpyGlass is well respected for its ability to find critical problems very early in the design cycle,” stated Chris Jones, Tensilica’s director of industry alliances. “Our engineers feel that the product suite provides high quality results and saves valuable design time.”
For more information, see http://www.tensilica.com/news_events/pr_2008_09_30.htm
Friday, September 26, 2008
Morpho, Inc. Offers Image Processing Software for Mobile Devices
Morpho, Inc., a leading provider of image processing software solutions for mobile devices, has joined the Tensilica Xtensions™ partner network. Morpho, Inc. offers software application expertise for developers of camera-enabled mobile phones, digital still cameras, camcorders and automobile navigation systems.
“Morpho’s PhotoSolid image stabilization and other products provide unique image and video processing capabilities to mobile devices. Combined with Tensilica’s HiFi 2-based audio processors and customizable processors, developers working with Morpho can add these imaging features in very power efficient SOC designs,” stated Larry Przywara, Tensilica’s director of mobile multimedia. “We expect that our customers around the world will leverage the expertise Morpho has to offer to differentiate their portable devices.”
For more information, see http://www.tensilica.com/news_events/pr_2008_09_25.htm
“Morpho’s PhotoSolid image stabilization and other products provide unique image and video processing capabilities to mobile devices. Combined with Tensilica’s HiFi 2-based audio processors and customizable processors, developers working with Morpho can add these imaging features in very power efficient SOC designs,” stated Larry Przywara, Tensilica’s director of mobile multimedia. “We expect that our customers around the world will leverage the expertise Morpho has to offer to differentiate their portable devices.”
For more information, see http://www.tensilica.com/news_events/pr_2008_09_25.htm
Monday, September 22, 2008
Tensilica Adds AMR WB+ Audio / Speech Decoder and Encoder to HiFi 2 Audio Processor Software Library
The AMR WB+ (Adaptive Multi Rate Wideband plus) speech codec improves on the available AMR Wideband speech codec by adding support for stereo signals and higher sampling rates, providing higher quality at low bit rates. For more information, see http://www.tensilica.com/news_events/pr_2008_09_16.htm
Tensilica’s Xtensa Processor Core Adopted by NEC
NEC Corporation of Tokyo, Japan, has licensed the Xtensa LX2 customizable processor core for NEC’s Mobile Phone SOC (system-on-chip). NEC will develop Mobile Phone SOCs using several different configurations of the Xtensa processor. See http://www.tensilica.com/news_events/pr_2008_09_08.htm for more information
Tensilica Adds Dolby Pro Logic II and Pro Logic IIx Decoders
Dolby Pro Logic II and Pro Logic IIx decoders have been added to the audio codec library for our Xtensa HiFi 2 Audio Engine, one of the most popular commercial audio cores for system-on-chip (SOC) designs. Both Dolby Pro Logic decoders are essential sound processing technologies employed in home theater AV receivers. Dolby Pro Logic II creates a captivating 5.1-channel surround sound experience from any stereo movie, music, TV, or game audio source. Dolby Pro Logic IIx extends the sound experience up to a full 7.1-channel configuration for highly realistic, natural surround sound. See http://www.tensilica.com/news_events/pr_2008_08_26.htm for more information
Tensilica Confirms New Intel Media Processor for Consumer Electronics Devices Uses Company's HiFi 2 Audio Processor
At the Intel Developer Forum in San Francisco, Tensilica announced that the new Intel Media Processor CE 3100 (formerly codenamed “Canmore”) for Internet-connected CE devices includes Tensilica’s HiFi 2 audio processor. For more information, see http://www.tensilica.com/news_events/pr_2008_08_20_Intel.htm
CircuitSutra Joins Tensilica Partner Program
CircuitSutra offers comprehensive SystemC services including TLM modeling of complete SOC (System on Chip) and individual IP (intellectual property) blocks at various abstraction levels, and in the creation of virtual platforms for embedded software development and architectural exploration. For more information, see http://www.tensilica.com/news_events/pr_2008_08_20_circuit.htm
Timesys Announces Embedded Linux for Tensilica Diamond Standard 232L Processor Core
LinuxLink software subscriptions for Tensilica’s Diamond Standard 232L processor cores are now available. The LinuxLink subscription provides developers with a complete embedded Linux platform that has been integrated and tested for Tensilica’s 232L Diamond Standard processor core, including a 2.6.25 kernel, 232L specific device drivers, GNU uClibc based toolchain, and hundreds of pre-built packages. When combined with Timesys’ TimeStorm development environment and ongoing support, LinuxLink subscribers will be able to quickly customize and test an embedded Linux platform for Tensilica’s 232L that has been optimized for their application. More information is at http://www.tensilica.com/news_events/pr_2008_08_15.htm
Labels:
Linux
Tensilica Hires Jerry Ardizzone as Vice President Worldwide Sales
Jerry Ardizzone has joined the company as vice president of worldwide sales. He brings over 24 years of semiconductor and semiconductor IP (intellectual property) sales management experience. Read more at http://www.tensilica.com/news_events/pr_2008_08_11.htm
Tensilica Appoints Semiconductor Industry Veteran Jack Guedj as New President and CEO
Expanding its executive team with the talented leadership required to take the company into its next phase of growth, Tensilica, Inc. today announced it has appointed Dr. Jack Guedj, Ph.D. as the company’s president and chief executive officer (CEO). Guedj has extensive experience as a senior executive with a variety of fast-growing start-ups and high-profile semiconductor companies focused in high-performance communications and multimedia. He succeeds Dr. Chris Rowen, founder of Tensilica, who is now the company’s chief technology officer (CTO), driving advanced processor technology and applications in close partnership with Tensilica’s strategic customers. Rowen will continue to serve on the Tensilica board of directors.
Read more at http://www.tensilica.com/news_events/pr_2008_07_16.htm
Read more at http://www.tensilica.com/news_events/pr_2008_07_16.htm
Triductor Licenses Tensilica Diamond Standard 212GP Processor Core
Triductor Technology, of Santa Clara, CA, and Suzhou, China, has signed a second license for the Diamond Standard 212GP general-purpose processor core and has completed a second design tape out. Triductor has used the Diamond 212GP processor as the system controller for VDSL2 design for both the customer premise (CPE) and central office (CO) designs. The Diamond 212GP is an area-efficient, low-power, fully synthesizable 32-bit RISC processor core that also supports basic single-MAC DSP functions. Read more at http://www.tensilica.com/news_events/pr_2008_07_08.htm
Friday, June 06, 2008
Imperas Announces Licensing, Distribution Relationship with Tensilica
Tensilica has signed a partnership agreement with Imperas to allow fast functional, instruction accurate models of its popular Xtensa and Diamond Standard processors to run on Open Virtual Platform (OVP) based virtual platforms. Specifically, wrapper files enabling integration of the Tensilica processor models are now available for free download from the OVPworld.org website. These models will run with Tensilica’s TurboXim fast functional simulator, which simulates at speeds 40 to 80 times faster than a traditional instruction set simulator.
For more information, see http://www.tensilica.com/news_events/pr_2008_06_06.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_06_06.htm
Tensilica and SPIRIT DSP Partner for Mobile Multimedia Audio and Voice
SPIRIT DSP, the world’s leading supplier of voice, audio and video software engines, and Tensilica, Inc. today announced that they have formed a strategic partnership and can now deliver 18 optimized, high quality digital audio and voice software packages that run on Tensilica’s HiFi 2 Audio Engine, an increasingly popular audio architecture for system-on-chip (SOC) designs.
Immediately available, SPIRIT audio software packages include: AAC-LC decode and encode, aacPlus v1 and v2 decode and encode, BSAC decode, MP3 decode and encode, Ogg Vorbis decode, and WMA decode and encode. Voice codecs include AMR-NB (narrowband), AMR-WB and G.729AB.
For more information, see http://www.tensilica.com/news_events/pr_2008_06_04.htm
Immediately available, SPIRIT audio software packages include: AAC-LC decode and encode, aacPlus v1 and v2 decode and encode, BSAC decode, MP3 decode and encode, Ogg Vorbis decode, and WMA decode and encode. Voice codecs include AMR-NB (narrowband), AMR-WB and G.729AB.
For more information, see http://www.tensilica.com/news_events/pr_2008_06_04.htm
New Open Source Linux Program
Tensilica, Inc. today announced that Embedded Linux 2.6 and GNU tools based on GCC 4.2, both available at www.linux-xtensa.org, is now backed by two well-respected Linux industry partners.
Embedded Alley Solutions, Inc. of San Jose, CA, provides Platform Optimized Linux Solutions, Linux consulting services and training. Timesys, of Pittsburgh, PA, is providing subscriptions to LinuxLink for Tensilica customers to access embedded software, tools, documentation, and support and Timestorm: an Eclipse-based IDE that provides a point-and-click interface for kernel and root filesystem configuration, profiling, testing, and debugging.
Read more at http://www.tensilica.com/news_events/pr_2008_06_02.htm
Embedded Alley Solutions, Inc. of San Jose, CA, provides Platform Optimized Linux Solutions, Linux consulting services and training. Timesys, of Pittsburgh, PA, is providing subscriptions to LinuxLink for Tensilica customers to access embedded software, tools, documentation, and support and Timestorm: an Eclipse-based IDE that provides a point-and-click interface for kernel and root filesystem configuration, profiling, testing, and debugging.
Read more at http://www.tensilica.com/news_events/pr_2008_06_02.htm
Labels:
Linux
Tuesday, May 06, 2008
Lawrence Berkeley National Laboratory and Tensilica Collaborate
Tensilica and the U.S. Department of Energy’s Lawrence Berkeley National Laboratory today announced a collaboration program to explore new design concepts for energy-efficient high-performance scientific computer systems. The joint effort is focused on novel processor and systems architectures using large numbers of small processor cores, connected together with optimized links, and tuned to the requirements of highly-parallel applications such as climate modeling. These demanding scientific problems require 100 to 1000 times higher computation throughput than today’s high-end computing installations, but conventional systems require so much electricity, generate so much heat, and require such complex physical installations that the costs would be prohibitive. This collaboration in application-directed supercomputing aims at making “exascale systems” (up to 1018 floating point operations per second) feasible and cost-effective.
For more information, see http://www.tensilica.com/news_events/pr_2008_05_05.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_05_05.htm
Dolby TrueHD Decoder Added to HiFi 2 Audio Engine
Tensilica, has added the Dolby TrueHD decoder to its audio codec library for Tensilica’s Xtensa HiFi 2 Audio Engine, one of the most popular commercial audio cores for system-on-chip (SOC) designs. Dolby TrueHD is the ultimate high-definition audio experience for next-generation entertainment, delivering warm, realistic and enveloping sound from the Blu-ray Disc format.
For more information, see http://www.tensilica.com/news_events/pr_2008_04_29.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_04_29.htm
Tuesday, April 15, 2008
Free Diamond 106Micro for FPGAs
Tensilica has joined Synplicity’s new ReadyIP Program and is providing the Diamond Standard 106Micro processor core – the industry’s smallest licensable 32-bit processor core based on an industry-standard architecture – free of charge through this program. The ReadyIP program delivers a vendor independent design methodology for FPGA implementation and allows designers to easily access, evaluate and incorporate third-party intellectual property (IP), like the Diamond Standard 106Micro, using Synplicity’s Synplify Pro and/or Synplify Premier Version 9.2 FPGA synthesis environments.
This week at the Embedded Systems Conference (ESC) in San Jose, CA, the companies will showcase how easy it is to download Tensilica’s Diamond Standard 106Micro processor core through the Synplicity tool flow.
For more information, see http://www.tensilica.com/news_events/pr_2008_04_15.htm
This week at the Embedded Systems Conference (ESC) in San Jose, CA, the companies will showcase how easy it is to download Tensilica’s Diamond Standard 106Micro processor core through the Synplicity tool flow.
For more information, see http://www.tensilica.com/news_events/pr_2008_04_15.htm
Thursday, April 03, 2008
Chris Rowen Elected to EDA Consortium Board of Directors
Chris Rowen, president and CEO of Tensilica, Inc., was elected to the Board of Directors of the EDA Consortium, the international association of companies developing EDA tools and services that enable engineers to create the world's electronic products.
“The EDA Consortium is ideally positioned in two key areas,” Rowen stated. “First, it’s positioned to raise the profile of EDA’s special role among customers, investors, developers, the electronics media and the broader public. Second, it plays an important role coordinating computing platform strategies, influencing export license models, pressing for smart education and immigration policies, and other key industry concerns. I am excited about serving this important community.”
Dr. Chris Rowen was a pioneer in the development of RISC architecture at Stanford in the early 1980s and helped start MIPS Computer Systems Inc. in 1984, where he served in a variety of functions including vice president for Microprocessor Development and managed MIPS in Europe. When Silicon Graphics purchased MIPS, he became the technology and market development leader for Silicon Graphics Europe. In 1996, he became Synopsys’ vice president and general manager of the Design Reuse Group. He founded Tensilica in July 1997. He received a B.A. in physics from Harvard University and M.S. and Ph.D. in electrical engineering from Stanford University.
“The EDA Consortium is ideally positioned in two key areas,” Rowen stated. “First, it’s positioned to raise the profile of EDA’s special role among customers, investors, developers, the electronics media and the broader public. Second, it plays an important role coordinating computing platform strategies, influencing export license models, pressing for smart education and immigration policies, and other key industry concerns. I am excited about serving this important community.”
Dr. Chris Rowen was a pioneer in the development of RISC architecture at Stanford in the early 1980s and helped start MIPS Computer Systems Inc. in 1984, where he served in a variety of functions including vice president for Microprocessor Development and managed MIPS in Europe. When Silicon Graphics purchased MIPS, he became the technology and market development leader for Silicon Graphics Europe. In 1996, he became Synopsys’ vice president and general manager of the Design Reuse Group. He founded Tensilica in July 1997. He received a B.A. in physics from Harvard University and M.S. and Ph.D. in electrical engineering from Stanford University.
Tuesday, April 01, 2008
New GUI Helps Cut Chip Energy Consumption
Tensilica has added a new graphical user interface (GUI) to its popular Xenergy estimator, a unique energy estimator for both Xtensa configurable processors and Diamond Standard processors. This “first of its kind” tool allows software developers to evaluate trade-offs, so their software can be optimized for power, and lets hardware designers optimize the design of Xtensa configurable processors for total energy consumption. For more information, see http://www.tensilica.com/news_events/pr_2008_03_31.htm
Tuesday, March 25, 2008
VaST Models Support Electronics Virtualization for Consumer Electronics OEMs
Models of Tensilica processors are now available from VaST Systems for the VaST CoMET System Engineering Environment.
Xtensa and Diamond Standard processor designers will be able to easily import the cycle accurate instruction set simulator provided by Tensilica into the VaST platform for early architectural exploration and software development and debugging. Chip designers can test their Tensilica processor-based designs early in the design cycle with real software using VaST virtual system prototypes, significantly shortening the overall design cycle compared to traditional design methods and allowing designers to test design trade-offs while changes can still be cost-effectively made.
For more information, see http://www.tensilica.com/news_events/pr_2008_03_25.htm
Xtensa and Diamond Standard processor designers will be able to easily import the cycle accurate instruction set simulator provided by Tensilica into the VaST platform for early architectural exploration and software development and debugging. Chip designers can test their Tensilica processor-based designs early in the design cycle with real software using VaST virtual system prototypes, significantly shortening the overall design cycle compared to traditional design methods and allowing designers to test design trade-offs while changes can still be cost-effectively made.
For more information, see http://www.tensilica.com/news_events/pr_2008_03_25.htm
Wednesday, March 12, 2008
Xtensa Processors Enable Next-Generation Mobile HD Radio Technology
Tensilica's Xtensa configurable processor has been designed into the baseband processor in Samsung EM’s HD Radio chipset. The baseband processor, based on a design by iBiquity Digital Corporation, the developer and licensor of HD Radio technology and a Tensilica processor reseller, integrates the memory, SDRAM and flash in a system-in-package measuring just 9 x 9 mm. Including the companion RF (radio frequency) chip, this low-power chip set’s total power consumption is 150 mW, making it ideal for a wide range of battery powered portable devices capable of tuning and demodulating AM/FM radio broadcast in both analog and HD Radio digital technology.
For more information, see http://www.tensilica.com/news_events/pr_2008_03_11.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_03_11.htm
Tuesday, March 04, 2008
Cisco Announces 40-core Quantumflow Router
From EETimes:
Cisco Systems debuts Tuesday (March 4) a router that packs on a custom 40-core processor a wide variety of networking services. The Ethernet giant aims to leverage its expertise designing complex ASICs to leapfrog competition in the $5 billion market for edge routers.
The Quantum Flow Processor takes to a new level Cisco's work on ASICs for its networking systems, surpassing in some ways technology in mainstream server CPUs from Intel Corp. and Sun Microsystems.
Key to the system is the 1.3 billion transistor flow processor, an 80W chip made in a 90nm process at Texas Instruments and designed using Cisco's customer-owned tooling. Each of its 40 Tensilica cores can handle up to four threads, far beyond the raw thread-level parallelism of Sun's 65nm Niagara or Intel's 45nm Penryn server CPUs.
See the entire article at http://www.eetimes.com/news/latest/showArticle.jhtml;jsessionid=T0ZYZJXI22R0MQSNDLSCKHA?articleID=206901479
Cisco Systems debuts Tuesday (March 4) a router that packs on a custom 40-core processor a wide variety of networking services. The Ethernet giant aims to leverage its expertise designing complex ASICs to leapfrog competition in the $5 billion market for edge routers.
The Quantum Flow Processor takes to a new level Cisco's work on ASICs for its networking systems, surpassing in some ways technology in mainstream server CPUs from Intel Corp. and Sun Microsystems.
Key to the system is the 1.3 billion transistor flow processor, an 80W chip made in a 90nm process at Texas Instruments and designed using Cisco's customer-owned tooling. Each of its 40 Tensilica cores can handle up to four threads, far beyond the raw thread-level parallelism of Sun's 65nm Niagara or Intel's 45nm Penryn server CPUs.
See the entire article at http://www.eetimes.com/news/latest/showArticle.jhtml;jsessionid=T0ZYZJXI22R0MQSNDLSCKHA?articleID=206901479
Monday, March 03, 2008
Tensilica and NuFront Show T-MMB Mobile TV Solution at China’s IIC 2008 Shows
Tensilica and NuFront will jointly exhibit at the IIC-China 2008 exhibitions March 3-4, 2008, in Shenzhen (booth:2K41) and March 10-11, 2008, in Shanghai (booth:4S41). Using Tensilica’s configurable processor technology, NuFront developed, and has gone into mass production with, a T-MMB (terrestrial-mobile multimedia broadcasting) mobile baseband DSP (digital signal processor). By watching mobile TV on a T-MMB phone, visitors will be able to experience NuFront’s technology in action.
The T-MMB mobile TV standard is in the running to be adopted throughout China, and there are plans to have this in place in time for the Beijing Olympics.
NuFront’s T-MMB mobile TV baseband chip employs Tensilica’s Xtensa® configurable processor. "Tensilica’s Xtensa processor was very attractive for our next design because standard processor cores couldn’t give us the performance we needed,” stated Hamilton Yong, COO, NuFront Software. “The only way to get the performance was to optimize the processor, and Tensilica is the only company with the automated tools to make that customization much easier and ensure our success.”
The T-MMB mobile TV standard is in the running to be adopted throughout China, and there are plans to have this in place in time for the Beijing Olympics.
NuFront’s T-MMB mobile TV baseband chip employs Tensilica’s Xtensa® configurable processor. "Tensilica’s Xtensa processor was very attractive for our next design because standard processor cores couldn’t give us the performance we needed,” stated Hamilton Yong, COO, NuFront Software. “The only way to get the performance was to optimize the processor, and Tensilica is the only company with the automated tools to make that customization much easier and ensure our success.”
WiLinx Licenses Tensilica’s Xtensa LX2 Processor Core For Low-Power UWB Chips
WiLinx licensed the Xtensa LX2 configurable processor for its low-power True-UWB single chip CMOS (Complementary Metal-Oxide-Semiconductor) solutions. WiLinx True-UWB product offers 7 GHZ (from 3 to 10 GHz) of air spectrum as the key enabler for worldwide adoption of UWB into the cellular phone handsets, PCs, PC peripherals and CE (consumer electronics) devices.
“Following an in-depth technical analysis, we selected Tensilica’s Xtensa LX2 configurable processor core for our single chip low power True-UWB product families. The 7-GHz coverage of our solution unleashes the full capacities of the WiMedia based UWB solution to our customers. In particular it includes ‘above 6 GHz WiMedia bands,’ mandatory for Bluetooth-3.0 enabled devices,” stated Masoud Djafari, CEO and co-founder of WiLinx. “Tensilica’s easily configurable processor technology plays a key role in delivering the feature rich WiMedia protocol at low power and cost. It also makes the product more flexible for future upgrades.”
For more information:
“Following an in-depth technical analysis, we selected Tensilica’s Xtensa LX2 configurable processor core for our single chip low power True-UWB product families. The 7-GHz coverage of our solution unleashes the full capacities of the WiMedia based UWB solution to our customers. In particular it includes ‘above 6 GHz WiMedia bands,’ mandatory for Bluetooth-3.0 enabled devices,” stated Masoud Djafari, CEO and co-founder of WiLinx. “Tensilica’s easily configurable processor technology plays a key role in delivering the feature rich WiMedia protocol at low power and cost. It also makes the product more flexible for future upgrades.”
For more information:
Thursday, February 28, 2008
Tensilica Configurable Processors Used in Stanford Smart Memories Project
Stanford University’s Smart Memories Project used Tensilica’s Xtensa LX2 configurable processor to develop a multiprocessor computing infrastructure for next generation applications. The Stanford Smart Memories Project has developed a prototype system-on-chip (SOC) design that provides the user the ability to program both the processor and the memory system of a chip-level multiprocessor. Using Tensilica allowed the Smart Memory team to focus on creating a flexible memory system that supports many different memory models, including message passing, coherent shared memory, and transactional memory. The design is currently being evaluated for possible commercial deployment by a couple of large semiconductor companies.
For more information, see http://www.tensilica.com/news_events/pr_2008_02_28.htm
For more information, see http://www.tensilica.com/news_events/pr_2008_02_28.htm
Tuesday, February 26, 2008
SandForce Licenses Tensilica’s Diamond Standard 108Mini for Storage Controller Chipsets
SandForce, Inclicensed the Diamond Standard 108Mini RISC controller core to use in their high-performance storage controller chipset designs.
“We needed a basic, low-cost, small controller, and the Diamond Standard 108Mini perfectly fit our requirements,” stated Alex Naqvi, CEO, SandForce.
For more information, see http://www.tensilica.com/news_events/pr_2008_02_26.htm
“We needed a basic, low-cost, small controller, and the Diamond Standard 108Mini perfectly fit our requirements,” stated Alex Naqvi, CEO, SandForce.
For more information, see http://www.tensilica.com/news_events/pr_2008_02_26.htm
Tuesday, February 19, 2008
Samsung Signs Multi-Year License for Tensilica Diamond Standard 330HiFi Audio DSP
Samsung Electronics Co., Ltd. has signed a broad multi-year license for Tensilica’s Diamond Standard 330HiFi audio DSP (digital signal processor). Tensilica’s HiFi architecture is the most popular commercial audio core for system-on-chip (SOC) designs. Samsung will use the Diamond Standard 330HiFi audio DSP in mobile handset and other designs.
“Tensilica’s HiFi 2 audio DSP architecture is a widely adopted, advanced DSP core with over 30 voice and audio encoder and decoder software packages readily available,” stated G. S. Han, vice president of Samsung Electronics, System LSI Division. “After a thorough technical evaluation of Tensilica’s HiFi offering, we found that the Diamond 330HiFi was the right audio DSP for Samsung and will be a key DSP in our IP portfolio for years to come.”
For more information, see http://www.tensilica.com/news_events/pr_2008_02_14.htm
“Tensilica’s HiFi 2 audio DSP architecture is a widely adopted, advanced DSP core with over 30 voice and audio encoder and decoder software packages readily available,” stated G. S. Han, vice president of Samsung Electronics, System LSI Division. “After a thorough technical evaluation of Tensilica’s HiFi offering, we found that the Diamond 330HiFi was the right audio DSP for Samsung and will be a key DSP in our IP portfolio for years to come.”
For more information, see http://www.tensilica.com/news_events/pr_2008_02_14.htm
Tuesday, January 08, 2008
Microprocessor Report comments on the Future of Multicore Processors
Tom Halfhill's editorial on The Future of Multicore Processors is right on the mark. You can read it at http://www.tensilica.com/pdf/Multicore_Microprocessor_Rept.pdf
Monday, January 07, 2008
Innovative Tensilica-Based Products on Display at CES 2008
Over 30 companies that either license Tensilica’s popular processor cores or use merchant market semiconductor products that include Tensilica’s cores will be displaying products at this week’s International Consumer Electronics Show (CES). These Tensilica-enabled products include some of the most advanced, innovative consumer devices, including LCD TVs, cellular phones, WiFi-enabled notebook computers, inkjet and laser printers.
The list of exhibitors at CES that either license Tensilica’s Xtensa configurable or Diamond Standard processor cores or use Tensilica-powered silicon products includes: AMD, Atheros Communications, Belkin, Broadcom, Cisco, Cypress Semiconductor, Dell, D-Link Systems, Epson, Fujitsu, Hewlett Packard, iBiquity Digital, Intel, JVC, Lenovo, LG Electronics, Marvell, Mediaphy, Mitsubishi, Motorola, NEC Electronics, NTT Electronics, NVIDIA, Olevia, Olympus, Panasonic, Samsung, Sony, Validity Sensors, and XM Radio.
The list of exhibitors at CES that either license Tensilica’s Xtensa configurable or Diamond Standard processor cores or use Tensilica-powered silicon products includes: AMD, Atheros Communications, Belkin, Broadcom, Cisco, Cypress Semiconductor, Dell, D-Link Systems, Epson, Fujitsu, Hewlett Packard, iBiquity Digital, Intel, JVC, Lenovo, LG Electronics, Marvell, Mediaphy, Mitsubishi, Motorola, NEC Electronics, NTT Electronics, NVIDIA, Olevia, Olympus, Panasonic, Samsung, Sony, Validity Sensors, and XM Radio.
Some of the most innovative solutions on display that include Tensilica processors include:
- AMD uses Tensilica’s processors for audio and video functions in the Imageon family of Media Processors, which are used in mobile phones from Cingular, Motorola, Panasonic and Samsung; and ATI Radeon graphics chips with Avivo-HD UVD technology.
- Epson uses multiple Tensilica processors for the entire image processing engine in its latest inkjet photo printer lines.
- HP uses Tensilica processors in its popular low-cost Laserjet product line.
- LG Electronics uses Tensilica’s processors in their mobile phones for the Korean T-DMB and European DVB-H television services.
- NVIDIA uses Tensilica processors in high-performance graphics cards and chips for cellular phones.
- Samsung’s HD Radio chip set, which is based on a Tensilica processor core, will be displayed at the iBiquity booth.
- Syntax Olevia 7 Series 1080p 42" and 47" LCD TV displays and the 65” Olevia 265TFHD LCD TV feature the integrated Realta HQV video processing engine from Silicon Optix, a Tensilica licensee.
Other products from CES vendors using the Silicon Optix HQV chip include:
- Yamaha DPX-1300 high-performance digital video projector
- Mitsubishi HC5000BL 1080p LCD projector
- Samsung Blu-Ray DVD Player
Tensilica-based chips provide the wireless USB functions for notebooks from Dell, Lenovo and Toshiba as well as the wireless USB hubs and adapters from Belkin and D-Link.
Tensilica will be hosting meetings in its suites at the Venetian Hotel at CES. To schedule a meeting, please contact Toni Garza at toni@tensilica.com.
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