Tensilica has joined Synplicity’s new ReadyIP Program and is providing the Diamond Standard 106Micro processor core – the industry’s smallest licensable 32-bit processor core based on an industry-standard architecture – free of charge through this program. The ReadyIP program delivers a vendor independent design methodology for FPGA implementation and allows designers to easily access, evaluate and incorporate third-party intellectual property (IP), like the Diamond Standard 106Micro, using Synplicity’s Synplify Pro and/or Synplify Premier Version 9.2 FPGA synthesis environments.
This week at the Embedded Systems Conference (ESC) in San Jose, CA, the companies will showcase how easy it is to download Tensilica’s Diamond Standard 106Micro processor core through the Synplicity tool flow.
For more information, see http://www.tensilica.com/news_events/pr_2008_04_15.htm
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