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Tuesday, March 25, 2008

VaST Models Support Electronics Virtualization for Consumer Electronics OEMs

Models of Tensilica processors are now available from VaST Systems for the VaST CoMET System Engineering Environment.

Xtensa and Diamond Standard processor designers will be able to easily import the cycle accurate instruction set simulator provided by Tensilica into the VaST platform for early architectural exploration and software development and debugging. Chip designers can test their Tensilica processor-based designs early in the design cycle with real software using VaST virtual system prototypes, significantly shortening the overall design cycle compared to traditional design methods and allowing designers to test design trade-offs while changes can still be cost-effectively made.

For more information, see http://www.tensilica.com/news_events/pr_2008_03_25.htm

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