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Wednesday, July 21, 2010

Use Customizable Processors as SOC Building Blocks

General-purpose microprocessor cores can’t deliver the application throughput, cost, and power efficiency needed for most computationally demanding embedded SOC tasks. These processors aren’t designed to efficiently manipulate audio, video or network packets or do other highly specialized tasks.

Until now, these demanding tasks had to be hard coded in RTL to get the speed required. However, designing millions of gates in RTL takes too long, is too hard to verify, and can’t be changed once the chip is fabricated.

Now there’s a real alternative to RTL design. You can use configurable, extensible Xtensa processors instead of RTL to finish your design much faster and add flexibility to adapt to changing standards or product requirements. Tensilica’s Xtensa processors provide both the I/O throughput and the computational performance previously only available with RTL design.