Arteris Adds Support for Tensilica's PIF for Network-on-Chip

This support will make it much easier for designers to get maximum efficiency when integrating Tensilica’s dataplane processing units (DPUs) into their system-on-chip designs. Using Arteris’ NoC technology, Tensilica’s DPUs can be mixed and matched with other processor cores or RTL blocks in complex, high-throughput designs. Tensilica’s DPUs are often used in multi-core chip designs, performing valuable data processing functions such as audio, video and baseband communications.