Tensilica used EVE’s ZeBu to validate the Diamond 38xVDO Video Engines. Targeted at mobile handsets and personal media players (PMPs), Tensilica’s Diamond Standard Video Engines are fully programmable to support VGA and standard definition (SD, also known as D1) video codecs.
ZeBu (for Zero Bugs) gives Tensilica verification engineers an easy-to-use and affordable solution that combines the best aspects of traditional emulation and rapid prototyping systems. It is used in Tensilica’s system-level regression testing, hardware/software integration, application and codec development, conformance testing and profiling. ZeBu also proved useful in validating multi-processor synchronous debugging. In addition to allowing software engineers to validate codecs, ZeBu also helped Tensilica’s engineers find subtle bugs during product development related to clock tree issues missed during register transfer level (RTL) simulation.
For more information, see http://www.tensilica.com/news_events/pr_2007_09_18.htm
Tuesday, September 18, 2007
Monday, September 17, 2007
Tensilica Joins Chip Estimate's Prime IP Partner Program
As a Prime IP Partner, Tensilica is enabling centralized access to information about the company’s standard processor cores and configurable processor technology at ChipEstimate.com. Tensilica IP solutions for system-on-chip (SOC) designs allow designers to create lower power, higher performance hardware and software for their integrated circuits.
ChipEstimate.com was launched in 2005 to provide comprehensive chip planning capabilities to the electronics and semiconductor community. In addition to the comprehensive IP catalog, designers can use the InCyte software available through the website to plan their next chips and explore die size, power, leakage and cost tradeoffs. Tensilica IP can now be searched for and considered in chip estimations though the portal.
A complete list of Chip Estimate IP partners can be seen at http://www.chipestimate.com/vendorlist.php.
ChipEstimate.com was launched in 2005 to provide comprehensive chip planning capabilities to the electronics and semiconductor community. In addition to the comprehensive IP catalog, designers can use the InCyte software available through the website to plan their next chips and explore die size, power, leakage and cost tradeoffs. Tensilica IP can now be searched for and considered in chip estimations though the portal.
A complete list of Chip Estimate IP partners can be seen at http://www.chipestimate.com/vendorlist.php.
Monday, September 10, 2007
P-Product Ports Codecs to the HiFi 2 Audio Engine
“Customers interested in custom ports of specialized audio codecs can turn to P-Product because they have the expertise in programming Tensilica's HiFi 2 Audio Engine platform,” stated Larry Przywara, Tensilica's director of mobile multimedia. “With their porting and algorithm optimization experience, P-Product is a strong asset for our HiFi 2 customers.”
“The HiFi 2 Audio Engine is a very well optimized core for all audio functions, ranging from low-power MP3 to high-end surround sound,” stated Michael Vulikh, CEO of P-Product. “The audio centric instructions Tensilica created enable easy programming in C code, avoiding the time consuming assembly-level programming usually required when porting audio algorithms to the typical DSPs and CPUs. The HiFi2 audio engine allows us to deliver superior MHz performance with far less development effort.”
P-Product has already ported audio software to Tensilica's HiFi 2 Audio Engine and has significant expertise in audio and video software porting.
“The HiFi 2 Audio Engine is a very well optimized core for all audio functions, ranging from low-power MP3 to high-end surround sound,” stated Michael Vulikh, CEO of P-Product. “The audio centric instructions Tensilica created enable easy programming in C code, avoiding the time consuming assembly-level programming usually required when porting audio algorithms to the typical DSPs and CPUs. The HiFi2 audio engine allows us to deliver superior MHz performance with far less development effort.”
P-Product has already ported audio software to Tensilica's HiFi 2 Audio Engine and has significant expertise in audio and video software porting.
Webcast this Wednesday
Tensilica will present a live webcast, “Using Configurable Processors as Enhanced
Application Processors and Controllers,” highlighting the way for SOC (system on chip) designers to achieve high performance while keeping the processor core area very small. The seminar will show the process of evaluating code for hot spots and then accelerlerating those functions using configuration options and the Verilog-like Tensilica Instruction Extension (TIE) language.
This webcast is Wednesday, September 12, at 11:00 a.m. PT / 2 p.m. ET. Sign up here: https://event.on24.com/eventRegistration/EventLobbyServlet?target=registration.jsp&eventid=92084&sessionid=1&key=477F1AD28B50C3D5E0FA6677040660D1&partnerref=sponlink&sourcepage=register
Application Processors and Controllers,” highlighting the way for SOC (system on chip) designers to achieve high performance while keeping the processor core area very small. The seminar will show the process of evaluating code for hot spots and then accelerlerating those functions using configuration options and the Verilog-like Tensilica Instruction Extension (TIE) language.
This webcast is Wednesday, September 12, at 11:00 a.m. PT / 2 p.m. ET. Sign up here: https://event.on24.com/eventRegistration/EventLobbyServlet?target=registration.jsp&eventid=92084&sessionid=1&key=477F1AD28B50C3D5E0FA6677040660D1&partnerref=sponlink&sourcepage=register
Wednesday, September 05, 2007
Tensilica and Tallika Announce Secure SOC FPGA Platform
The Configurable Secure SOC FPGA/ASIC Platform, based on Tensilica’s Xtensa Processor, is a fully verified and silicon proven hardware/software platform that is ideal for any design team that needs a full implementation of RSA (including encryption, decryption, and key-pair generation acceleration) and/or an SOC with integrated hardware security functions.
Tallika’s security solution includes a 32-bit AHB/APB backbone and Tallika’s linked-list-based DMA controller integrated with its security IP blocks - AES/TDES/SHA/MD5 on the AHB bus and 2048-bit native exponentiation engine on the APB bus. The Secure FPGA Platform is based on Xilinx Virtex4 LX160 FPGA devices and comes with a complete software library to access security functions as well as with a full implementation of RSA encrypt, decrypt, and key-pair generation (including acceleration for Primality testing). The solution is also available for license by Tallika as soft IP for ASIC development.
The Secure Platform core IP and FPGA platform are available now from Tallika. More information regarding this solution can be found at http://www.tallika.com/products_security_secure_soc.htm.
Tallika’s security solution includes a 32-bit AHB/APB backbone and Tallika’s linked-list-based DMA controller integrated with its security IP blocks - AES/TDES/SHA/MD5 on the AHB bus and 2048-bit native exponentiation engine on the APB bus. The Secure FPGA Platform is based on Xilinx Virtex4 LX160 FPGA devices and comes with a complete software library to access security functions as well as with a full implementation of RSA encrypt, decrypt, and key-pair generation (including acceleration for Primality testing). The solution is also available for license by Tallika as soft IP for ASIC development.
The Secure Platform core IP and FPGA platform are available now from Tallika. More information regarding this solution can be found at http://www.tallika.com/products_security_secure_soc.htm.
Monday, August 27, 2007
Buy Dell and Lenovo Notebooks with Xtensa inside
WiQuest Communications, Inc.'s WQST110/101 Certified Wireless USB silicon is being used by Dell
and Lenovo in their latest notebook PC products. Dell’s Inspiron 1720 notebook and Lenovo’s ThinkPad T61/T61p 15.4-inch widescreen notebook are part of the very first wave of Wireless USB platform certifications awarded by the USB Implementers Forum that contain WiQuest's chips, which contain Xtensa processors.
and Lenovo in their latest notebook PC products. Dell’s Inspiron 1720 notebook and Lenovo’s ThinkPad T61/T61p 15.4-inch widescreen notebook are part of the very first wave of Wireless USB platform certifications awarded by the USB Implementers Forum that contain WiQuest's chips, which contain Xtensa processors.
Monday, August 20, 2007
New Application Notes Available
We've posted three new application notes to our web site:
* Fast OFDM on Xtensa Processors
* Implementing A Mutex and Barrier Synchronization Library on Xtensa
* Optimizing for Energy using the Xenergy Energy Optimizator Tool
* Fast OFDM on Xtensa Processors
* Implementing A Mutex and Barrier Synchronization Library on Xtensa
* Optimizing for Energy using the Xenergy Energy Optimizator Tool
SiBEAM, Inc. Selects Tensilica Configurable Processor for Baseband DSP in Wireless Link for HDTV Devices
SiBEAM, Inc., a leading innovator of millimeter wave (mmWave) solutions and developer of high-speed wireless communications platforms, has selected Tensilica’s Xtensa configurable processor for an upcoming chip design project.for baseband DSP.
“SiBEAM has developed its wireless communications products to deliver high quality wireless video solutions for consumer electronics and display applications. These applications demand high data rate transmission to multiple devices within an indoor wireless environment using conventional CMOS silicon,” said Kumar Mahesh, manager of MAC and Software Design for SiBEAM, Inc. “We selected Tensilica’s Xtensa processor for its ability to help us achieve our goal of developing innovative-multi-gigabit, lower-power mmWave communications products. By optimizing the Xtensa processor into a tailored processor core, this enables our products to attain the performance these wireless applications demand.”
For more information, see http://www.tensilica.com/news_events/pr_2007_08_20.htm
“SiBEAM has developed its wireless communications products to deliver high quality wireless video solutions for consumer electronics and display applications. These applications demand high data rate transmission to multiple devices within an indoor wireless environment using conventional CMOS silicon,” said Kumar Mahesh, manager of MAC and Software Design for SiBEAM, Inc. “We selected Tensilica’s Xtensa processor for its ability to help us achieve our goal of developing innovative-multi-gigabit, lower-power mmWave communications products. By optimizing the Xtensa processor into a tailored processor core, this enables our products to attain the performance these wireless applications demand.”
For more information, see http://www.tensilica.com/news_events/pr_2007_08_20.htm
Friday, August 10, 2007
See Audio NetSeminar
Tensilica Presents
“Low-Power, Low-Overhead, High-Fidelity Digital Sound for SOCs”
Live Webcast Wednesday, August 15, at 11:00 a.m. PT
Tensilica will present a live webcast, discussing how most consumer products must support multiple codecs and offer a broad range of audio-enhancement features. All of these factors have resulted in a high demand for a flexible, high-performance, low-power audio engine that adds digital-sound capabilities to an SOC with the least amount of design effort and a small on-chip footprint. This online seminar presents a proven way to add low-power, low-overhead, high-fidelity audio to SOC designs.
The presenter for the August 15th broadcast will be Steve Leibson, Technology Evangelist, Tensilica. Leibson, the author of several books on integrated circuit design, spent 15 years as an award-winning technology journalist, serving as Editor in Chief of EDN, the Microprocessor Report, and Embedded Developers Journal. He also served as an engineer at several companies, including HP.
To sign up for this event, visit http://tensilica.com/news_events/events.htm
“Low-Power, Low-Overhead, High-Fidelity Digital Sound for SOCs”
Live Webcast Wednesday, August 15, at 11:00 a.m. PT
Tensilica will present a live webcast, discussing how most consumer products must support multiple codecs and offer a broad range of audio-enhancement features. All of these factors have resulted in a high demand for a flexible, high-performance, low-power audio engine that adds digital-sound capabilities to an SOC with the least amount of design effort and a small on-chip footprint. This online seminar presents a proven way to add low-power, low-overhead, high-fidelity audio to SOC designs.
The presenter for the August 15th broadcast will be Steve Leibson, Technology Evangelist, Tensilica. Leibson, the author of several books on integrated circuit design, spent 15 years as an award-winning technology journalist, serving as Editor in Chief of EDN, the Microprocessor Report, and Embedded Developers Journal. He also served as an engineer at several companies, including HP.
To sign up for this event, visit http://tensilica.com/news_events/events.htm
Labels:
audio
Friday, August 03, 2007
Tata Elxsi Becomes Tensilica's First Authorized Multimedia Processor Design Center
Tata Elxsi Ltd., a leading independent embedded design service company headquartered in Bangalore, India, with offices in major locations around the world, has become the first authorized design center for Tensilica’s multimedia customers. Tata Elxsi’s engineers have been fully trained on Tensilica’s HiFi 2 Audio Engine and Diamond Standard 38xVDO Video Engine family, and will be able to provide SOC design services including hardware and system software design for semiconductor and electronics manufacturers. Tata Elxsi has served as a design center for Tensilica’s Xtensa configurable processor family for over three years, and is already assisting global electronics companies with Tensilica-based multimedia designs.
“Tensilica’s Diamond Standard 38xVDO Video Engine family is the most capable processor core-based video solution on the market today, supplying full D1 resolution Main Profile H.264 performance,” stated Madhukar Dev, CEO, Tata Elxsi. “And the HiFi 2 Audio Engine is proven in designs that are shipping in huge volumes right now. Our turnkey SOC design capability and proven strengths in multimedia design will help Tensilica’s customers quickly integrate these powerful engines into their SOC designs, reducing product development time and costs. Our network of offices and strong presence in key geographies such as US and Europe and Asia, including Japan, Taiwan and South Korea, provides customers with easy access to world-class multimedia system and engineering expertise.”
“Tensilica’s Diamond Standard 38xVDO Video Engine family is the most capable processor core-based video solution on the market today, supplying full D1 resolution Main Profile H.264 performance,” stated Madhukar Dev, CEO, Tata Elxsi. “And the HiFi 2 Audio Engine is proven in designs that are shipping in huge volumes right now. Our turnkey SOC design capability and proven strengths in multimedia design will help Tensilica’s customers quickly integrate these powerful engines into their SOC designs, reducing product development time and costs. Our network of offices and strong presence in key geographies such as US and Europe and Asia, including Japan, Taiwan and South Korea, provides customers with easy access to world-class multimedia system and engineering expertise.”
Labels:
design centers,
HiFi Audio,
multimedia,
video
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