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Wednesday, September 05, 2007

Tensilica and Tallika Announce Secure SOC FPGA Platform

The Configurable Secure SOC FPGA/ASIC Platform, based on Tensilica’s Xtensa Processor, is a fully verified and silicon proven hardware/software platform that is ideal for any design team that needs a full implementation of RSA (including encryption, decryption, and key-pair generation acceleration) and/or an SOC with integrated hardware security functions.
Tallika’s security solution includes a 32-bit AHB/APB backbone and Tallika’s linked-list-based DMA controller integrated with its security IP blocks - AES/TDES/SHA/MD5 on the AHB bus and 2048-bit native exponentiation engine on the APB bus. The Secure FPGA Platform is based on Xilinx Virtex4 LX160 FPGA devices and comes with a complete software library to access security functions as well as with a full implementation of RSA encrypt, decrypt, and key-pair generation (including acceleration for Primality testing). The solution is also available for license by Tallika as soft IP for ASIC development.

The Secure Platform core IP and FPGA platform are available now from Tallika. More information regarding this solution can be found at

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