Look to Tensilica for the Widest Range of DSP IP Cores

Everybody's DSP requirements are different. Instead of trying to figure out how to squeeze your requirements into a DSP core that doesn’t quite match your needs, Tensilica gives you lots of choices - as a matter of fact, Tensilica offers an almost unlimited range of DSPs. How can we do this? You can pick from several pre-defined function blocks in our ConnX DSP family or you can design your own to exactly match your application. Find out more.

Check Out Tensilica's Job Listings - We need HW, SW, and DSP Engineers

We just added to our extensive listing of jobs in Pune, Beijing and Santa Clara. Check out the full listing. Do you know any good Software build and QA engineers? How about Baseband DSP software? We're growing right now and hiring as fast as we can find good candidates.

Sign Up Now for Tensilica's Sept. 14 Taiwan Seminar

Learn more about Tensilica's DSPs and DPUs (dataplane processing units) and how these can help you develop chips that are lower power and higher performance than other IP cores. Sign up now.

Read EETimes Article about Tensilica CTO Chris Rowen's HotChips Paper

This article showcases the ConnX BBE64, which combines SIMD and VLIW concepts and lets designers configure processors for a range of handset and base stations uses.

"We are trying to build a world-leading DSP core, arguably the fastest DSP core yet," said Chris Rowen, Tensilica founder and chief technologist in a talk at the Hot Chips event here.

Tensilica Needs Applications Engineers

As a matter of fact, Tensilica has a record number of job postings now in several categories, from a corporate attorney to HW and SW engineers. These jobs are located in Pune, Beijing, and Santa Clara. Check out the full list.

Guide to using Tensilica's Cores in the SOC Dataplane

Designers have long understood how to use a single processor for the control functions in an SOC design. However, there are a lot of data-intensive functions that control processors cannot handle. That's why designers design RTL blocks for these functions. However, RTL blocks take a long time to design and verify, and are not programmable to handle multiple standards or changes. Read this section of our web site for the latest tips on using processors in the SOC dataplane.

See Tensilica CTO Chris Rowen's Fast DSP Presentation at HotChips Thursday, 4:15 pm

Chris Rowen, CTO and founder of Tensilica, will present, “The World’s Fastest DSP Core: Breaking 100 GMAC/s Barrier,” at the HOT CHIPS 23 symposium in Stanford, CA, on August 18.  Dr. Rowen will discuss the accelerated transition to 4G wireless connectivity through LTE and LTE-Advanced that mandates a more programmable baseband architecture.  He will disclose the rationale, machine organization, and instruction set of the Tensilica ConnX BBE64 family, a high-performance SIMD/VLIW digital signal processor built for 4G cellular systems. 

Read Tensilica CTO Chris Rowen's Blog about HotChips 2011

The HotChips conference August 17-19 at Stanford University is well respected as the foremost conference about new innovations in processors for chip design. Chris Rowen gives his enlightened perspective of what to look for, including the battle for mainstream processor architectures, new technologies, and talks on higher levels of system integration. See his review in his blog on Low-Power Engineering.

See Tensilica at the Flash Memory Summit, 8:30 Thursday AM (tomorrow)

Neil Robinson's presentation will be about how the processor choice affects both data management tasks and computational throughput. He really pinpoints the difference between Tensilica's processors and other cores - how our processors were designed from the ground up to be ideal for the compute-intensive dataplane functions (others designed for control). Stop by and listen if you're going to this conference.

Take Advantage of Nintendo's Price Cuts to Get Tensilica Inside 3DS Game

Nintendo has dropped the price of it's 3-D handheld game, so now it's one of the most fun ways to get a consumer product with Tensilica inside. And while this price drop is supposed to be effective August 12, rumor has it you can get it from Walmart now. Additionally, starting September 1 they will start giving away some games for free. So get yours now.

Tensilica's HiFi Audio DSP Does All of the World's Digital Radio Standards

Designers of digital radio systems can use one processor core - Tensilica's HiFi 2 Audio DSP - to run all of the decoders required throughout the world for digital radio, enabling a universal worldwide digital radio receiver. Tensilica's HiFi2 Audio DSP supports all of the terrestrial and satellite standards: DAB, DAB+, HD Radio, DRM, and XM Radio. See our chart of all standards and what we have to offer.

Tensilica's Fall Seminar in Japan - Sept. 16, 2011 - Register now!

Want to learn more about Tensilica's audio and baseband products? Sign up now for our fall seminar in Japan. And stay tuned for news about our seminars in Taiwan and Israel. See our events page.

LG Electronics Picks Tensilica’s HiFi Audio DSP and SW Codecs for HDTV

"We picked the HiFi Audio DSP for its speed, power, and performance, its C-based programming model, and its completeness as a turnkey solution, including both the hardware and the software codecs we need for medium and high-end DTVs," said Seung Jong Choi, Vice President, LG Electronics. "Moreover, Tensilica offers us an attractive, automated process to customize the HiFi Audio DSP and add our own algorithms to further differentiate our products in highly competitive markets."