Thursday, May 27, 2010
This is an introduction and tutorial to techniques applicable to accelerating the radix-2 FFT, using TIE techniques that are simple and easy to implement. This document discusses a basic, but very powerful capability of TIE, the ability to define a register file of any arbitrary width and instructions that perform computations on the register file. Additional techniques, such as FUSION and SIMD, are introduced to show how to further improve performance, along with techniques to reduce gate count. These TIE techniques improve FFT performance by a factor of almost 100 times compared to a conventional processor. While the radix-2 FFT algorithm was chosen to illustrate the use of TIE on a relatively simple DSP algorithm, the techniques covered in this application note apply to accelerating any algorithm.
Posted by Tensilica at 10:00 AM