New apnote: Using TIE Queues with Xtensa Processors

Want to see how easy it is to use Queues to bypass the bus altogether and get blazing fast data processing through the processor? Read this application note. Where the data is FIFO ordered, like audio samples or network packets, it makes sense to use RTL FIFO queues to manage the physical channel for the data. This note outlines the simple syntax to extend the Xtensa LX processor with input and output FIFO queue interfaces to couple tightly with external RTL FIFO queues