Tensilica White Paper: 7 Critical Questions to Ask when Adding Audio to your SOC Design

In  a high-stakes game, the selection of an audio solution for each mobile SOC is a major decision. The wrong decision is decidedly perilous for two major reasons.
1.       The wrong decision will harm playback quality that can be obvious when the end products is demonstrated to the customer.
2.       The wrong decision will shorten battery life and will either make the end product less competitive because it's talk time or playback time will be shorter than the competition or because the end product must be larger and heavier than the competition to accommodate a larger battery.
Read the white paper for more information.

Tensilica Doubles DSP Shipments, Ranks Second in DSP IP Market According to The Linley Group

Tensilica is now ranked second in shipments of chips containing DSP IP cores for 2011 by The Linley Group, the industry's leading source for independent technology analysis of semiconductors for networking, mobile, and wireless. Tensilica attributes this growth to its focus on dataplane signal processing and strong unit volumes in smart phones, home entertainment, and communications LTE infrastructure. Shipments of devices with Tensilica DSP cores roughly doubled from 2010 to 2011. See the full press release.

Don't Forget! Two More DAC Panels with Tensilica

IP Packaging – What’s in it for me? - This panel will discuss the pros and cons of IP standardization from various perspectives and explore the rate of adoption of the IP-XACT standard.
Grant Martin, chief scientist, Tensilica
Wednesday, June 6, 2:30 p.m.
Duolog Booth #1520

It’s the Software, Stupid! Truth or Myth – Industry experts will debate three opposing views on the importance of software in product differentiation.
Dr. Chris Rowen, founder and CTO, Tensilica
Thursday, June 7, 1:30 – 3:00 p.m.
Booth #305

Tensilica is in Two Panels at DAC in SF Tomorrow

Hogan's Heroes: Learning from Apple - Panelists will discuss what the electronics industry has learned from Apple.
Jack Guedj, president and CEO, Tensilica
Tuesday, June 5, 10:00 - 11:00 a.m.
Booth #310

System Models -- Does One Size Fit All? - Panelists will review different aspects of system modeling and discuss which abstraction levels best address specific user requirements.
Andrea Kroll, senior product specialist, Tensilica
Tuesday, June 5, 1:30 - 3:00 p.m.
Booth #305

Tensilica White Paper: TIE - The Fast Path to High Performance Embedded SOC Processing

There's a powerful way to optimize an Xtensa processor-through a processor-description language called TIE, Tensilica's Instruction Extension language. TIE is a simple way to make Xtensa processor cores faster and more efficient by adding new task-optimized instructions and I/O interfaces.

This short White Paper introduces the core ideas behind TIE. You'll see that TIE looks a lot like Verilog, but anyone can learn the basics of TIE in a few minutes whether they already know how to write Verilog descriptions or not. Just a few lines of TIE can make a dramatic difference in an Xtensa processor's performance and flexibility for targeted tasks. Xtensa processors with TIE customizations can compute and move data tens or hundreds of times faster than conventional processor cores. As a result, your SOC gets smaller, cheaper, and faster and it will consume less power.

Tensilica's CEO Jack Guedj on Hogan's Heroes DAC Panel Next Tuesday

Jim Hogan brings together an A-list of industry luminaries to discuss "Learning from Apple" at 10 am next Tuesday in booth 310. We assume his panel will be standing room only as it always is one of the big highlights of DAC. See you there!

Why is there a For Lease sign in front of Tensilica's HQ?

Because we're growing like crazy and we've finally outgrown our building! We're moving to a much bigger 2-story building across the street mid-July.

Tensilica Discusses Importance of Customizable IP Subsystems at Semico IMPACT Conference

This Wednesday from 3-4:15 pm, Steve Roddy will participate in a panel discussion titled, "Will IP Subsystems Help Reduce Complexity... At What Cost?" at Semico's IMPACT Conference: Focus on The IP Ecosystem. The panel will look at the evolution of complex SoC architectures and the role of IP subsystems in this growth.
Need a ticket? Let me know. Details on the conference are here.

Tensilica and VWorks Partner to Provide Virtual Prototyping Platforms

As part of the collaboration, Tensilica's DPU models are integrated with the VLAB virtual platform simulation environment from VWorks, providing early access, high performance and direct software debug capability. Software and services are provided by VWorks and its service partner ASTC.
See press release.

Tensilica and Sensory Working on Hands-free Voice

Tensilcia and Sensory are working on HW/SW technology that will allow you to say commands to your smartphone - even if it is turned off. Imagine what this could do for disabled people. Read the article.