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Monday, June 07, 2010

Updated White Paper: Diamond Standard Controllers

Need a good controller? Tensilica has the widest range of code-compatible controllers ranging from a very tiny, efficient basic controller (the Diamond 106Micro) to the super fast 3-way VLIW Diamond 570T. Check out this product line by looking at this white paper.

Friday, June 04, 2010

New Job Post: Design Verification Engineer - Santa Clara, CA

We now have 5 jobs posted:
- Design Verification Engineer - Santa Clara
- University Program Intern - Santa Clara
- Senior Application Engineer - Santa Clara
- Application Engineer - Pune, India
- Design Verification Engineer - Pune, India

Wednesday, June 02, 2010

Nintendo DSi - Cool Game with Tensilica Core Inside

Have fun playing with one of the coolest games with a Tensilica processor inside. The Nintendo DSi is just one example of all the great products that use Tensilica processors. Check out our customer gallery for more examples.

Tuesday, June 01, 2010

Updated White Paper on Audio DSP

This paper explains the benefits of using a programmable processor-based solution for audio processing in SOC designs, as well as the disadvantages of using a RISC or other general-purpose core. It explains the 300 audio-specific instructions added to make the HiFi 2 and HiFi EP Audio DSPs much more efficient than standard RISC processors to handle audio processing tasks.

Thursday, May 27, 2010

Speeding Basic DSP Functions - FFT Example Ap Note

This is an introduction and tutorial to techniques applicable to accelerating the radix-2 FFT, using TIE techniques that are simple and easy to implement. This document discusses a basic, but very powerful capability of TIE, the ability to define a register file of any arbitrary width and instructions that perform computations on the register file. Additional techniques, such as FUSION and SIMD, are introduced to show how to further improve performance, along with techniques to reduce gate count. These TIE techniques improve FFT performance by a factor of almost 100 times compared to a conventional processor. While the radix-2 FFT algorithm was chosen to illustrate the use of TIE on a relatively simple DSP algorithm, the techniques covered in this application note apply to accelerating any algorithm.

Tuesday, May 25, 2010

Tensilica and Iberium Partner for DTV Solutions

"We entered into this partnership because we foresee a need to provide flexible, multi-standard IP solutions for the increasing number and complexity of worldwide DTV standards," stated Slobodan Simovich, Iberium's CEO. "Tensilica's DPU technology is a superior programmable platform that delivers performance and power efficiencies 10 to 100X greater than legacy CPU or DSP platforms."

Friday, May 21, 2010

New Job Post: Sr. Applications Engineer, Santa Clara, CA

Just posted this morning. If you know anyone, we're looking!

Thursday, May 20, 2010

Now Hiring: University Program Intern

The University Program Intern is a 10-week summer position aimed at creating a University community that shares information on design projects and updating our University web presence.

RESPONSIBILITIES:
* Evaluate wealth of information we have on over 100 universities that have used Xtensa processors in their research.
* Determine an effective way to present and maintain that information online for (i) maximum interaction between universities and (ii) general industry awareness
* Implement the web presence as part of our existing website (CMS based)
* Determine how best to communicate with universities on a regular basis to maintain interest in our products and facilitate information exchange
Perform other duties as required in this dynamic business.
See our web site for full details. Email resumes to paula@tensilica.com

Tuesday, May 18, 2010

New Japan Office and Seminar on May 24

Our Japan office is celebrating its move to a larger office by hosting a customer seminar featuring discussions by representatives from NTT DOCOMO and Epson. If you're in Japan, be sure to sign up for our seminar.

Monday, May 17, 2010

Great article: Making IP Tradeoffs for Power

In this interesting article from Chip Design Magazine, the author interviews people from several IP companies, including Tensilica. The key to analyzing hardware design changes is to see what happens to the software once the change is made. That's the beauty of Tensilica's Xenergy tool. Change the processor, test out the software. See what changes make the most sense. Find out more about Xenergy at http://www.tensilica.com/products/literature-docs/application-notes/xtensa-tools/xenergy-energy-optimizator.htm.