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Monday, March 28, 2011

Introducing Xtensa LX4 - with 4X the Data Bandwidth for High-Performance DSP

Xtensa LX4 is ideal forcompute-intensive dataplane and DSP functions such as imaging, video, networking and baseband wired/wireless communications. Any application that requires extensive data processing will significantly benefit from the breakthrough features - particularly those that quadruple data bandwidth -  built into Tensilica's new Xtensa LX4 dataplane processor (DPU) for SOCs
The new Xtensa LX4 DPU supports wider local data memory bandwidth of up to 1024 bits per cycle, wider VLIW (very long instruction word) instructions up to 128 bits for increased parallel processing, and a cache memory prefetch option that boosts overall performance for systems with long off-chip memory latency. Tensilica is already using many of these capabilities in its recently introduced ConnX BBE64 DSP for LTE Advanced communications.