Monday, November 15, 2010
New Job Posting: Sr. Strategic Field Application Engineer
We are looking for someone who can work directly with customers in key technical pre-sales and post-sales roles to provide architectural and design consulting on the best use of Xtensa in a customer's ASIC design.
Friday, November 12, 2010
Have You Seen all the Smart Phones with Tensilica Inside?
The Samsung Capitvate and Ruby II, the Google Nexus One, the LG SH-400, the Sharp SH705ill, the Pantech Ease and Hush - see them by clicking on the headline.
Wednesday, November 10, 2010
White paper: Highest MHz Does Not Mean Highest Peformance
In fact, processors with high clock rates consume much more power because power dissipation rises faster than operating frequency. All major PC CPU vendors now offer multicore processors that run at lower clock frequencies than older generation single-core processors.
The same argument holds true for embedded processors, which is even more important for embedded products that operate under very tight power/energy budgets such as portable devices-because extending battery life is an important feature that improves product marketability-but it is also true for non-portable devices because consumers do not want noisy cooling fans in their set-top boxs or flt-panel televisions while IT managers want routers and switches that reduce electrical costs by minimizing energy consumption in the data centers. For these reasons, SOC development teams need to achieve performance goals while keeping a lid on clock rates.
The same argument holds true for embedded processors, which is even more important for embedded products that operate under very tight power/energy budgets such as portable devices-because extending battery life is an important feature that improves product marketability-but it is also true for non-portable devices because consumers do not want noisy cooling fans in their set-top boxs or flt-panel televisions while IT managers want routers and switches that reduce electrical costs by minimizing energy consumption in the data centers. For these reasons, SOC development teams need to achieve performance goals while keeping a lid on clock rates.
Monday, November 08, 2010
Featured partner: Dolby Labs
Tensilica's HiFi 2 and HiFi EP Audio DSPs provide the widest range of support for the excellent software Dolby has to offer for home entertainment. See our complete list of codecs.
Friday, November 05, 2010
Thursday, November 04, 2010
Cut DSP Development Time - Get High Performance from C - Read our White Paper
The magic is in the compiler technology. Learn how an advanced compiler can help you get equivalent or better performance using standard C than other DSPs programmed in assembly code.
Tuesday, November 02, 2010
Will Google TV be a Winner?
Yes, Tensilica's audio is designed into Google TV. But we're not the only ones who think Google TV will be a great platform. See this discussion.
Monday, November 01, 2010
White Paper: A PRocessor and DSP IP Selection Checklist
Here is a list of questions to ask yourself, your team, and any processor IP providers you contact. This list will help you to avoid unhappy IP choices and will help you get exactly what your team needs to develop successful SOC designs on time, within budget, and with minimal hassle.
Thursday, October 28, 2010
Tuesday, October 26, 2010
Why Powerline Communications is Getting "Hot"
Pardon the pun, but we're seeing several customers designing Tensilica cores into powerline applications. This Gigaom article (click on headline) gives a nice overview.
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