See Diamond NetSeminar at Techonline

See Tensilica's newest NetSeminar at Technoline. "Using Diamond Standard Processors in AMBA-based SOCs" gives a great overview of our Diamond Standard processor family. It's free and can be viewed any time. Go to:
http://www.techonline.com/learning/livewebinar/400002

Tensilica Adds Ogg Vorbis Decoder to Popular Xtensa HiFi 2 Audio Engine

Tensilicahas added an Ogg Vorbis decoder for its popular Xtensa HiFi 2 Audio Engine and Diamond 330HiFi processor core. The Xtensa HiFi 2 Audio Engine is the most popular audio processor core on the market, designed into devices ranging from cellular phone handsets to prosumer audio. This year, Tensilica’s customers will ship tens of millions of products using the Xtensa HiFi Audio Engine. With this software decoder, the capability to play music encoded in the Ogg Vorbis format can be added to any chip that includes the Xtensa HiFi 2 Audio Engine. The Ogg Vorbis format is increasingly popular in video games and digital audio players because it is open source and royalty free.

For more information on the HiFi 2 audio engine, see http://www.tensilica.com/products/hifi_audio.htm
For more information on the Diamond Standard 330HiFi Audio processor, see http://www.tensilica.com/diamond/di_330hifi.htm

See Tensilica at GSPX

Tensilica will be delivering 3 presentations at GSPX, October 30-November 2, Santa Clara Convention Center:

Tuesday, 8 am - "MPSOC Flow for Multiformat Video Decoder based on Configurable and Extensible Processors" – Gulbin Ezer

Wednesday, 11 am - "Integrating IP in Multicore DSP/Processor SoCs "- panel on Multicore SOC design – Sumit Gupta

Thursday, 8 am - "Goodbye, Mr. DSP: DSP IP Cores are Superfluous for New SOC Designs" – Steve Leibson

NetEffect 10Gb iWARP Ethernet Channel Adapter Employs Multiple Xtensa Processors

Congratulations to NetEffect, Inc., for the recent introduction of its 10Gb iWARP Ethernet Channel Adapter (ECA). The NE010 is the first adapter on the market that fully implements the iWARP Ethernet standards, allowing data center managers to realize full 10 Gbps throughput using existing Ethernet hardware and software. NetEffect used multiple Tensilica Xtensa configurable processors in their impressive custom chip design for this adapter.

“We selected Tensilica’s Xtensa processors because of the ease with which we were able to optimize certain functions for our high-speed, demanding Ethernet channel adapters,” stated Rick Maule, NetEffect’s CEO. “Tensilica’s automated process let us optimize our embedded processors for our exact application in a fraction of the time that it would have taken us using other alternatives.”

For more info, see http://www.tensilica.com/news_events/pr_2006_10_24.htm

NuFront Software Picks Xtensa for DSP in China’s Mobile TV Handsets

NuFront Software of Beijing, China, is designing a complex system-on-chip (SOC) using Tensilica’s Xtensa configurable processor. NuFront is a leading design firm specializing in SOC designs for China’s digital television products. They are developing a baseband DSP (digital signal processor) for China’s Mobile TV handset standard, and are using the Xtensa processor because they can optimize it for the performance they need.

"Tensilica’s Xtensa processor was very attractive for our next design because standard processor cores couldn’t give us the performance we needed,” stated Hamilton Yong, COO, NuFront Software. “The only way to get the performance was to be able to optimize the processor, and Tensilica is the only company with the automated tools to make that customization much easier and ensure our success.”

EE Solutions Licenses Diamond Standard 108Mini Processor Core

EE Solutions (EES) of Hsinchu, Taiwan, a leading design service provider with considerable expertise in SOC (system-on-chip) design, has licensed the Diamond Standard 108Mini processor core for a high-performance, low-power application for one of its customers.

"Tensilica’s Diamond Standard 108Mini core perfectly met our needs for a low-cost, low-power, high-performance controller core for a high-volume customer application in the mobile space,” stated Jim Su, chief executive officer of EES. “We evaluated all of the popular 32-bit controller cores on the market, and Tensilica’s Diamond Standard 108Mini gave us the best price,performance and power solution.”

Afa Adopts Tensilica’s Xtensa Configurable Processor

Afa Technologies, Inc. (Afa) of Taipei, Taiwan, has selected the Xtensa configurable processor for a new multi-standard mobile digital TV receiver system-on-chip (SOC) design project. Afa is a fabless IC design house specializing in designs for DTV (digital television), cellular phones and digital home LANs (local area networks).

“We picked Tensilica’s Xtensa processor because we were very impressed with the ability to customize it, using the TIE (Tensilica Instruction Extension) language, for our demanding mobile TV demodulator application,” stated Philip Sun, Afa’s executive vice president. “Tensilica’s unique technology allows us to implement in low-power processors what previously was only possible using hardwired logic. By optimizing the Xtensa processor, we can deliver a programmable solution for advanced mobile TV handsets, and still meet the low power constraints needed to deliver the long battery life consumers expect.”

For more information, see http://www.tensilica.com/news_events/pr_2006_10_10.htm

Nethra Licenses Tensilica’s Diamond 108Mini Core Processor for Mobile Handset Imaging

Nethra Imaging, a privately held developer of imaging solutions for consumer applications, has licensed the Diamond Standard 108Mini processor core as the main system controller for its upcoming mobile handset imaging chip design.

“We picked Tensilica’s Diamond 108Mini over other processor cores because of the small code size, small area and ease of integration into our product development environment,” said Murty Bhavana, Nethra’s vice president of marketing. "Image and video capture and processing require very high performance imaging algorithms. Using a Diamond 108Mini to provide a high performance processor core, our customers will have enough headroom to add their IP and provide product differentiation."

For more information, see http://www.tensilica.com/news_events/pr_2006_10_03.htm

ThreadX RTOS for Tensilica’s Diamond Standard and Xtensa Processor Cores

Express Logic's popular ThreadX RTOS now supports all of Tensilica’s Diamond Standard and Xtensa configurable processor cores. The combination of ThreadX and Tensilica’s Xtensa is already production-proven in a high-volume SOC design used in personal laser printers.

ThreadX is a small-footprint RTOS with real-time determinism that enables Tensilica customers to support applications that demand high-performance, low overhead, and fast time-to-market. As a full port to all of the Tensilica products, ThreadX supports Tensilica’s on-chip coprocessors including its floating point unit, Vectra DSP engine and special Tensilica Instruction Extension (TIE) cases. The simplicity and low cost of ThreadX, including its royalty-free licensing, make it attractive for high-volume applications in consumer devices, office automation, medical equipment and networking. ThreadX has been widely embraced and is currently deployed in over 300 million electronic products.

For more info, see http://www.tensilica.com/partners/os_express_logic.htm

ProDesign to Provide ASIC Prototyping and Verification for Tensilica’s Diamond Standard Processors

Designers can now use ProDesign’s CHIPit ASIC Rapid Prototyping and Emulation systems to verify designs using Tensilica’s popular Diamond Standard processor cores. CHIPit verification platforms provide verification and validation through the SOC and ASIC project life cycle.

“We are working with Tensilica because a growing number of design teams are using Tensilica’s Diamond Standard processor cores,” stated Heiko Mauersberger, ProDesign’s chief technology officer. “The Diamond Standard cores deliver the best mix of low power and high performance for applications ranging from simple 32-bit controllers to high-end DSPs and an audio processor.”

ProDesign’s CHIPit ASIC Prototyping line provides an integrated set of tools with debug capabilities that provide a dual solution for hardware and software verification and validation throughout the product life cycle. The FPGA-based ProDesign CHIPit platforms can handle capacities up to 21-million ASIC gates and run at system speeds up to 200 MHz.

For more info, see http://www.tensilica.com/partners/hw_prodesign.htm