Monday, August 20, 2012
SemiWiki article: I/O Bandwidth with Tensilica Cores
First, a little plug for SemiWiki. It's one of the best sources of information on the Internet, with articles written by industry veterans who really understand IP and semiconductor design. Most recently they reviewed one of Tensilica's best capabilities - the option to bypass the bus entirely and stream data right into the processor. No other processor core can do this. Read more about it here.
Posted by Tensilica at 11:12 AM