There's a powerful way to optimize an Xtensa
processor-through a processor-description language called TIE,
Tensilica's Instruction Extension language. TIE is a simple way to make
Xtensa processor cores faster and more efficient by adding new
task-optimized instructions and I/O interfaces.
This short White Paper introduces the core ideas behind TIE. You'll
see that TIE looks a lot like Verilog, but anyone can learn the basics
of TIE in a few minutes whether they already know how to write Verilog
descriptions or not. Just a few lines of TIE can make a dramatic
difference in an Xtensa processor's performance and flexibility for
targeted tasks. Xtensa processors with TIE customizations can compute
and move data tens or hundreds of times faster than conventional
processor cores. As a result, your SOC gets smaller, cheaper, and faster
and it will consume less power.
Thursday, May 31, 2012
Wednesday, May 30, 2012
Tensilica's CEO Jack Guedj on Hogan's Heroes DAC Panel Next Tuesday
Jim Hogan brings together an A-list of industry luminaries to discuss "Learning from Apple" at 10 am next Tuesday in booth 310. We assume his panel will be standing room only as it always is one of the big highlights of DAC. See you there!
Tuesday, May 22, 2012
Why is there a For Lease sign in front of Tensilica's HQ?
Because we're growing like crazy and we've finally outgrown our building! We're moving to a much bigger 2-story building across the street mid-July.
Monday, May 14, 2012
Tensilica Discusses Importance of Customizable IP Subsystems at Semico IMPACT Conference
This Wednesday from 3-4:15 pm, Steve Roddy will participate in a panel discussion titled, "Will IP Subsystems Help
Reduce Complexity... At What Cost?" at Semico's IMPACT Conference: Focus
on The IP Ecosystem. The panel will look at the evolution of complex
SoC architectures and the role of IP subsystems in this growth.
Need a ticket? Let me know. Details on the conference are here.
Need a ticket? Let me know. Details on the conference are here.
Tuesday, May 08, 2012
Tensilica and VWorks Partner to Provide Virtual Prototyping Platforms
As part of the collaboration, Tensilica's DPU models are integrated with
the VLAB virtual platform simulation environment from VWorks, providing
early access, high performance and direct software debug capability.
Software and services are provided by VWorks and its service partner
ASTC.
See press release.
See press release.
Monday, May 07, 2012
Tensilica and Sensory Working on Hands-free Voice
Tensilcia and Sensory are working on HW/SW technology that will allow you to say commands to your smartphone - even if it is turned off. Imagine what this could do for disabled people. Read the article.
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