Here are two of the cutest witches who came to visit Tensilica today. Yes, it's our annual bring-your-kids to Tensilica day for trick-or-treating.
Thursday, October 27, 2011
Tuesday, October 25, 2011
EnVerv Selects Tensilica ConnX DSP for Smart Grid Power Line Communications
“We picked the ConnX DSP core because of its flexible architecture and excellent processing power,” stated Dr. Farrokh Farrokhi, executive vice president of engineering at EnVerv. “By using the ConnX DSP we were able to reap the benefits of implementing custom instructions that are unique to our signal processing algorithms, thus giving us the benefit of a custom DSP design while maintaining the flexibility of a soft architecture.” Read the press release.
Wednesday, October 19, 2011
Tensilica's Booth at the TSMC Open Innovation Platform Partners Event
Here we are at the TSMC Partners event. Tensilica showcased its audio DSP with demos of QSound and SRS audio enhancement packages.
Monday, October 17, 2011
See Tensilica Tomorrow at TSMC Open Innovation Platform Ecosystem Forum
Yes, we'll be at the San Jose convention center from 8 am to 6:30 pm in booth 104. See you there!
Thursday, October 13, 2011
White Paper: How to Increase ASICs and SOC Computational Performance with Long-Word Processors
VLIW processors execute multiple independent instructions each clock cycle and provide a tremendous performance boost per clock cycle without incurring the exponential power-consumption increase caused by clock-rate increases. However, VLIW architectures have their own problems, particularly code bloat, which causes code footprints to balloon-thus increasing memory costs.
The Xtensa LX processor uses an innovative approach to VLIW design called FLIX (Flexible Length Instruction eXtensions), which gives ASIC and SOC designers more options for cost/performance tradeoffs. FLIX technology provides the flexibility to develop ASIPs (application-specific instruction-set processors) that freely and modelessly intermix smaller RISC instructions with multi-operation FLIX instructions. Read our white paper.
The Xtensa LX processor uses an innovative approach to VLIW design called FLIX (Flexible Length Instruction eXtensions), which gives ASIC and SOC designers more options for cost/performance tradeoffs. FLIX technology provides the flexibility to develop ASIPs (application-specific instruction-set processors) that freely and modelessly intermix smaller RISC instructions with multi-operation FLIX instructions. Read our white paper.
Tuesday, October 11, 2011
IntegrIT's DSP Math Library Ported to Tensilica's Baseband DSPs
The IntegrIT NatureDSP Math library simplifies the software development process for design teams that want to port their own signal processing application software to the ConnX BBE16 DSP. The IntegrIT Nature DSP Signal+ is a collection of signal processing routines needed for implementation of typical digital signal processing functions including highly optimized routines for filtering, FFT, matrix, trigonometric and other math operations.
Read the press release.
Read the press release.
Wednesday, October 05, 2011
White Paper: Optimizing a DSP Architecture for Wireless Baseband
The high computation demands of next-generation cellular and broadcast wireless require both higher efficiency and greater flexibility in baseband processing. New DSP architectures are needed for applications with heavy workloads with complex filtering, FFT, and MIMO matrix operations. Read the white paper.
Subscribe to:
Posts (Atom)