On-Chip Communications: Where do we Stand Now?

Wednesday, June 16, 2010 - At the Design Automation Conference in Anaheim, CA
Time: 9:00 AM — 11:00 AM
Location: 209AB
It is around ten years since Networks-on-Chips emerged as an active research topic. There were widely varying opinions about the prospects for NOCs, ranging from "This is the future of on-chip interconnect" to "It will never work". The session will bring together prominent researchers and practitioners from the domain of on-chip communication architecture to look back at the decade of progress on this topic, and (i) evaluate where NOCs stand in terms of maturity as a research area, (ii) examine where they have succeeded and where they have failed, (iii) identify challenges and issues that remain to be addressed, and (iv) predict how they will be used in the next five years (Are they ready to replace buses as the mainstay architecture for on-chip interconnect? If not, where will NOCs thrive?). The session will conclude with a panel moderated by Grant Martin (Tensilica Chief Scientist) where speakers will speculate on the future of NOCs.