New FLAC Decoder for HiFi Audio DSP Core

FLAC - the Free Lossless Audio Codec - is an audio format similar to MP3, but lossless so the audio is compressed without any loss in quality. Because it is not a proprietary format, is not encumbered by patents, and has an open-source reference implementation, FLAC has become increasingly popular. More information on FLAC is available at http://flac.sourceforge.net.

Eric Clapton Crossroads Concert

Yes, I'm lucky enough to go. So I'll be out of the office, returning Tuesday, 6/28.

New Job Post: Sr. Systems Network Administrator

Yes, we're hiring! The Sr. Systems and Network Administrator designs, analyzes, and implements projects for Cisco based LAN and/or WAN infrastructure. Additionally, this person analyzes, installs, and supports Windows operating system, database or utilities software. If you can do this, apply now!

Tensilica HiFi is first IP Core Approved for Dolby MS10 Multistream Decoder

The Dolby MS10 Multistream Decoder is critical to next-generation designs because it enables viewers to receive content not only from traditional broadcast and operator sources, but also from the Internet, USB devices, game consoles, and PCs. This array of source content uses a corresponding array of audio codecs, which Dolby has consolidated into MS10.

Build in Your Own Differentiation - Customize Your Processor Core

Your products will be harder for your competitors to copy, since you'll be using your unique processor instead of an industry standard core that anyone can purchase. And your products will be much more optimized for your application.

Company Picnic Today

Lots of fun things for kids and families. And the weather couldn't be better - nice and cool. Starts at 3.

Do you own an HP Laserjet printer with Tensilica processors inside?

Chances are, if you own an HP Laserjet, you have Tensilica product. We're also in Epson printers and printers from one major manufacturer that won't let us disclose their name. Why printers? For a while, the PC processor did most of the printing work. But with the shift to stand-alone printers that can be used as host=less printers for digital cameras, manufacturers had to build in a lot more processing power. And that's where Tensilica fits in. Our processors can be customized to do the tasks required, whether it's JPEG decompression, image enhancement, size scaling, color processor, or whatever.

Friday at #47DAC Workshop on SystemC with Analog, Digital, Software

In this tutorial, the presenters will cover the key concepts and state of the art methodologies for SystemC-based system development processes. A special emphasis is put on the interoperability of different domains, i.e., hardware, software, and analog. We will present an overview of the state of the art for a wide range of aspects including important topics such as executable specification, heterogeneous multi-processor SoC design, hardware-dependent software optimization, hardware/software co-verification, and analog, continuous-time system modeling. Industrial use cases will be used to illustrate the benefits from using and combining these methodologies based on SystemC’s ability to describe multi-domain systems. Featuring Tensilcia's Chief Scientist - Grant Martin.

On-Chip Communications: Where do we Stand Now?

Wednesday, June 16, 2010 - At the Design Automation Conference in Anaheim, CA
Time: 9:00 AM — 11:00 AM
Location: 209AB
It is around ten years since Networks-on-Chips emerged as an active research topic. There were widely varying opinions about the prospects for NOCs, ranging from "This is the future of on-chip interconnect" to "It will never work". The session will bring together prominent researchers and practitioners from the domain of on-chip communication architecture to look back at the decade of progress on this topic, and (i) evaluate where NOCs stand in terms of maturity as a research area, (ii) examine where they have succeeded and where they have failed, (iii) identify challenges and issues that remain to be addressed, and (iv) predict how they will be used in the next five years (Are they ready to replace buses as the mainstay architecture for on-chip interconnect? If not, where will NOCs thrive?). The session will conclude with a panel moderated by Grant Martin (Tensilica Chief Scientist) where speakers will speculate on the future of NOCs.

Tensilica- Berkeley Labs - Colorado Extraflop System Design

See how far researchers (and our CTO) have pushed multi-core Tensilica-based processing (20 million cores) to achieve incredible results. What a radical alternative - but it really makes sense.

Work in Our Cool Accounting Dept

Yes, we're growing and expanding and now need a senior accountant. Apply now. Accounting CAN be fun!

New VP: Eric Dewannain - VP/GM Baseband Business Unit

A very important addition to our Tensilica family, Eric has extensive experience at TI and Intel. "Because of our solid DPU foundation and success in baseband signal processing, we've been able to ramp up quickly and add top engineering talent to our team," stated Jack Guedj, Tensilica's president and CEO. "Now, with Eric, we're reaching critical mass with strong leadership to help us continue our growth trajectory."

"It's exciting to join an aggressive company that's rapidly becoming the architecture of choice for programmable baseband signal processing," Dewannain stated. "The amazing thing is how fast we can develop new products and provide optimized solutions for the mobile wireless market using the same Xtensa DPU foundation and tools we license to our customers. Leveraging this strong Xtensa DPU foundation, Tensilica has been able to develop a comprehensive IP (intellectual property) suite tailored for LTE and introduce two generations of ConnX BBE baseband DSPs in less than two years. Any other IP vendor would take several years to develop these products."

Updated White Paper: Diamond Standard Controllers

Need a good controller? Tensilica has the widest range of code-compatible controllers ranging from a very tiny, efficient basic controller (the Diamond 106Micro) to the super fast 3-way VLIW Diamond 570T. Check out this product line by looking at this white paper.

New Job Post: Design Verification Engineer - Santa Clara, CA

We now have 5 jobs posted:
- Design Verification Engineer - Santa Clara
- University Program Intern - Santa Clara
- Senior Application Engineer - Santa Clara
- Application Engineer - Pune, India
- Design Verification Engineer - Pune, India

Nintendo DSi - Cool Game with Tensilica Core Inside

Have fun playing with one of the coolest games with a Tensilica processor inside. The Nintendo DSi is just one example of all the great products that use Tensilica processors. Check out our customer gallery for more examples.

Updated White Paper on Audio DSP

This paper explains the benefits of using a programmable processor-based solution for audio processing in SOC designs, as well as the disadvantages of using a RISC or other general-purpose core. It explains the 300 audio-specific instructions added to make the HiFi 2 and HiFi EP Audio DSPs much more efficient than standard RISC processors to handle audio processing tasks.