Tensilica's "Great Race" today

This afternoon at 3 employees will meet for Tensilica's "Great Race". Walkers and runners will be entered into a raffle for a grand prize. Wonder what it is?

Design Automation Conference (DAC) wrap-up

I went up to San Francisco yesterday (Tuesday) to attend DAC. I heard it was much busier on "free" Monday. It was pretty quiet yesterday, but that's because a lot of the good activity is happening in vendor suites or in the technical sessions. That leaves little time to wander the halls. Many booths were just front-ends to the suites, where the action was happening as vendors gave demos of new tools and capabilities. People with little companies with small booths and no suites looked like they were getting pretty bored with the lack of hall traffic. There were very few flashy booths - the XJTAG girls in their short skirts were about as exciting as it got. Why don't they just let qualified people in for free every day? The more traffic, the better the show.

Synopsys and Cadence issued press releases about their efforts to create workable tools for 32 nm designs - let's hope they can really make their tools work. The show is still going on today at Moscone center.

Virtutech Now Supports Xtensa Cores

Need to create a virtual mixed-architecture SOC? Try using Virtutech's Simics, which allows engineers to adopt a virtualized systems development approach, resulting in faster product definition, development and deployment in comparison to traditional hardware centric approaches. It supports over 40 cores! See the press release at http://www.tensilica.com/news/294/330/Virtutech-Simics-Processor-Support-Grows-to-Include-Multicore-RMI-XLR-MIPS64-and-Configurable-Tensilica-Xtensa-Cores.htm

Validity Sensors Licenses Two Tensilica Processors for High-Volume Fingerprint Sensors

"Power, performance and die size are critical factors in our leading edge sensor designs," stated Alex Erhart, EVP of products at Validity Sensors. "Moving up from a 16-bit controller to a 32-bit controller creates a lot of opportunities to add enhanced features that need to be balanced with the area and power impact of a higher end controller. Tensilica's processors give us the speed we need with the lowest power and minimal die size. We were particularly impressed with the ability to customize the processors for our exact application requirements."

For more, see http://www.tensilica.com/news/293/330/Validity-Sensors-Licenses-Two-Tensilica-Processors-for-High-Volume-Fingerprint-Sensors.htm

New SW Design Center Supports Audio/Video and Security Apps

Calsoft is Tensilica's newest software design center. "We joined Tensilica's partner program because we have seen increasing interest in Tensilica's customizable processors among designers of next-generation video and audio chips," Sanjay Dube, Calsoft's director of business development. "As we combine our expertise in embedded technologies with skills in audio-video codec development and security applications, we are able to offer a unique set of services, including developing audio-video codecs, porting VoIP stacks, board support packages, software integration, protocols testing and QA. Now, equipped with Tensilica's full tool set, we can help companies with a variety of complex and diverse software requirements."

http://tinyurl.com/create.php

Blue Wonder Communications Uses Tensilica for LTE

"New design approaches are needed to successfully implement the LTE and LTE Advanced standards," stated Dr. Peter Meyer, managing director and head of development at Blue Wonder Communications. "The traditional approach of using hardwired logic for the performance-intensive PHY layer datapath simply won't work. Because LTE systems run at such high data rates, it would require millions of gates of logic developed with RTL (register transfer level) methods - and that creates a huge verification hurdle. Using Tensilica's automated processor creation tools we are able to quickly generate customized DPUs delivering the performance levels of custom hardware with the programmability of a processor."

See the press release at http://www.tensilica.com/news/291/330/Blue-Wonder-Communications-to-Develop-LTE-Baseband-IP-Using-Multiple-Optimized-Tensilica-Dataplane-Processors.htm

A Processor and DSP IP Checklist

"A Processor and DSP IP Selection Checklist" - This list will help you to avoid unhappy IP choices and will help you get exactly what your team needs to develop successful SOC designs on time, within budget, and with minimal hassle. http://www.tensilica.com/products/literature-docs/white-papers/ia-processor-dsp-ia-processor-and-dsp-iip-selection-checklist.htm

New white paper: 10 Tips for Successful SOC Design

One way to ensure SOC design success is to start out in the right direction. That's the purpose of this White Paper-to help you start out in the right direction. These ten SOC design tips come straight from the hard-won experience we have gotten from working with our customers on many types of SOC design projects for wireless, multimedia, communications, networking, computing, and storage applications.

http://www.tensilica.com/products/literature-docs/white-papers/10-tips-for-soc-design/