ThreadX RTOS for Tensilica’s Diamond Standard and Xtensa Processor Cores

Express Logic's popular ThreadX RTOS now supports all of Tensilica’s Diamond Standard and Xtensa configurable processor cores. The combination of ThreadX and Tensilica’s Xtensa is already production-proven in a high-volume SOC design used in personal laser printers.

ThreadX is a small-footprint RTOS with real-time determinism that enables Tensilica customers to support applications that demand high-performance, low overhead, and fast time-to-market. As a full port to all of the Tensilica products, ThreadX supports Tensilica’s on-chip coprocessors including its floating point unit, Vectra DSP engine and special Tensilica Instruction Extension (TIE) cases. The simplicity and low cost of ThreadX, including its royalty-free licensing, make it attractive for high-volume applications in consumer devices, office automation, medical equipment and networking. ThreadX has been widely embraced and is currently deployed in over 300 million electronic products.

For more info, see http://www.tensilica.com/partners/os_express_logic.htm

ProDesign to Provide ASIC Prototyping and Verification for Tensilica’s Diamond Standard Processors

Designers can now use ProDesign’s CHIPit ASIC Rapid Prototyping and Emulation systems to verify designs using Tensilica’s popular Diamond Standard processor cores. CHIPit verification platforms provide verification and validation through the SOC and ASIC project life cycle.

“We are working with Tensilica because a growing number of design teams are using Tensilica’s Diamond Standard processor cores,” stated Heiko Mauersberger, ProDesign’s chief technology officer. “The Diamond Standard cores deliver the best mix of low power and high performance for applications ranging from simple 32-bit controllers to high-end DSPs and an audio processor.”

ProDesign’s CHIPit ASIC Prototyping line provides an integrated set of tools with debug capabilities that provide a dual solution for hardware and software verification and validation throughout the product life cycle. The FPGA-based ProDesign CHIPit platforms can handle capacities up to 21-million ASIC gates and run at system speeds up to 200 MHz.

For more info, see http://www.tensilica.com/partners/hw_prodesign.htm

HARDI Electronics Provides ASIC Prototyping for Tensilica’s Diamond Standard Processors

ASIC designs using Tensilica’s popular Diamond Standard processor cores can now be prototyped and verified on the HARDI ASIC Prototyping System (HAPS). HARDI Electronics is now part of Tensilica’s Diamond Standard partners program.

“Our Diamond Standard processors have been prototyped and verified with great success on HAPS products by several of our customers and partners,” stated Larry Przywara, Tensilica’s director of strategic alliances. “Our customers appreciate the flexibility and cost-effectiveness that the highly modular HAPS products provide. HARDI is a solid platform for verifying multi-million gate ASIC designs.”

“HAPS is the ideal platform for customers of Tensilica’s popular Diamond Standard processors to use to prototype and verify their ASIC designs, as well as get a head start in generating embedded software,” stated Lars-Eric Lundgren, president of HARDI Electronics. “The HAPS system can scale from small projects to providing industry leading capacity for large ASIC designs, so it is suitable for any Diamond processor-based SOC prototype.”

Hear Chris Rowen on "On Design Radio"

Listen to Chris Rowen's interview (podcast) on "On Design Radio" at http://www.ondesignradio.com/podcast/

eInfochips Becomes Authorized Tensilica Processor Design Center

eInfochips has joined the Tensilica Xtensions Design Center Partner Program and is offering system-on-chip (SOC) design services for customers using Tensilica’s Xtensa configurable processors or Diamond Standard processor cores. eInfochips has design centers in the US and India and a proven track record in design services ranging from silicon design and verification to physical design as well as board design and embedded firmware development.

“We’re seeing an increased demand for Tensilica’s Xtensa and Diamond Standard processors in a wide variety of applications from current and potential new customers,” stated eInfochips VP of marketing Tapan Joshi. “Our expertise can help these customers get their new designs to market much faster. And we can provide the full range of services for Tensilica customers, from silicon design and verification to embedded firmware development and total system integration.”

See http://www.tensilica.com/news_events/pr_2006_09_19.htm for more information

iBiquity Digital Picks Tensilica’s Xtensa Configurable Processors for HD Radio

iBiquity Digital Corporation of Columbia, MD, has licensed Tensilica’s Xtensa LX configurable processors, including the market leading HiFi2 audio engine, to provide digital baseband and audio processing for many HD Radio™ receivers. iBiquity will also become a value-added reseller of Tensilica’s technology, bundling it into select iBiquity silicon Intellectual Property (IP) offerings marketed to major semiconductor companies.

iBiquity is the sole developer of digital HD Radio technology, providing the innovations that allow the transmission of digital audio and data along with existing AM and FM analog signals. Besides delivering vastly superior sound that virtually eliminates the static and hiss often associated with analog radio, iBiquity’s technology provides a platform for advanced new services including HD2 multicasting, enabling FM stations to broadcast multiple streams of unique programming over a single frequency. More than 3,000 stations in the U.S. are in the process of upgrading to iBiquity’s digital HD Radio technology, with nearly 1,000 on the air and approximately 350 offering HD2 multicast channels. In addition, the technology is gaining visibility throughout the world.

“We chose Tensilica’s configurable processor technology because it provided a common processor platform that could be optimized for both the digital baseband and audio portions of our design,” stated Gene Parrella, iBiquity’s vice president of IC Development. “We were also very impressed with Tensilica’s area and power efficient processor technology. Both silicon area efficiency and low-power for portability are essential for our customers.”

Great Video Article

See "Creating multi-standard, multi-resolution video engines using configurable processors" on CMP's Video/Imaging DesignLine:

http://www.videsignline.com/howto/videoprocessing/193000929

Fujitsu to Distribute Tensilica’s Diamond Standard Processor Cores

Fujitsu Microelectronics America, Inc. (FMA) has signed an agreement to distribute Tensilica’s Diamond Standard processor cores as part of Fujitsu’s ASIC intellectual property (IP) offering. All six of Tensilica’s Diamond Standard processors will be available to Fujitsu’s ASIC customers for seamless integration into new chip designs.

The processors range from a low-power 32-bit controller up to the industry’s highest performance digital signal processing (DSP) core and a multifunction audio processor that has been designed into millions of cellular phones. Under the agreement, Tensilica’s Diamond Standard processors will be available to Fujitsu’s ASIC customers via the company’s IPWare library and COT customer directly.

“Tensilica’s Diamond Standard processor family includes controllers for the entire range of design requirements, so our customers can select the version that is optimal for their ASIC and COT design,” said Jason So, senior director of COT and ASIC Business Group for Fujitsu Microelectronics America. “We are pleased to offer the processor family as part of our extensive portfolio of solutions.”

Chris Rowen talks at Memcon

Chris Rowen, president and CEO of Tensilica, will present “Configurable Processors: Driving Efficient and Flexible Memory and I/O in SOC Designs” at this week's Memcon conference at the Santa Clara convention center. His talk is on Wednesday, Sept. 13, at 2:30 pm. He will discuss how the use of configurable processors, often many processors, each part of the SOC design, can implement multiple functions, sharing common resources efficiently, and reducing both design time and silicon cost.

New Customer Gallery on Web Site

See our new customer gallery at http://www.tensilica.com/markets/customer_handsets.htm . Here you can see the latest products that include chips with Xtensa and Diamond Standard processors. You'll see cellular handsets, printers, scanners, entertainment devices, and products for network access, network infrastructure, storage networking and wireless USB.

Free Online Seminar

See the new online seminar we did with Mentor Graphics.

Mentor Graphics Seamless product has been named the premier co-verification tool for Tensilicas new Diamond Standard series of processor cores. Seamless provides designers with a virtual platform to debug hardware/software integration issues while increasing simulation throughput, thereby allowing designers to quickly validate that the system hardware and software are functionally correct before prototypes are manufactured.

This online seminar walks you through the basics of these two product lines, explaining how they work in conjunction with one another to provide a complete solution to SoC design complexity.

http://www.mentor.com/products/fv/events/multi_socs.cfm

Micrium uC/OS-II RTOS Support Now Available

Micrium’s uC/OS-II RTOS (real-time operating system) now supports Tensilica’s Diamond Standard and Xtensa configurable processors. A port of uC/OS-II is now available on the Micrium web site at www.micrium.com/tensilica. The popular uC/OS-II RTOS now can run on all of Tensilica’s Diamond Standard CPU and controller cores, including the Diamond Standard 108Mini, 212GP, 232L, and 570T, as well as most Xtensa configurations.